Young-kyu Choi
Young-kyu Choi
Computer Science, University of California
Verified email at cs.ucla.edu - Homepage
Title
Cited by
Cited by
Year
A quantitative analysis on microarchitectures of modern CPU-FPGA platforms
Y Choi, J Cong, Z Fang, Y Hao, G Reinman, P Wei
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
1332016
A real-time FPGA-based 20 000-word speech recognizer with optimized DRAM access
YK Choi, K You, J Choi, W Sung
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (8), 2119-2131, 2010
462010
HLScope+: Fast and accurate performance estimation for FPGA HLS
Y Choi, P Zhang, P Li, J Cong
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 691-698, 2017
262017
HLScope: High-Level performance debugging for FPGA designs
Y Choi, J Cong
2017 IEEE 25th Annual International Symposium on Field-Programmable Custom …, 2017
202017
Acceleration of EM-based 3D CT reconstruction using FPGA
Y Choi, J Cong
IEEE transactions on biomedical circuits and systems 10 (3), 754-767, 2015
182015
VLSI for 5000-word continuous speech recognition
Y Choi, K You, J Choi, W Sung
IEEE International Conference on Acoustics, Speech and Signal Processing …, 2009
142009
In-depth analysis on microarchitectures of modern heterogeneous CPU-FPGA platforms
YK Choi, J Cong, Z Fang, Y Hao, G Reinman, P Wei
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 12 (1), 1-20, 2019
132019
FPGA-based implementation of a real-time 5000-word continuous speech recognizer
Y Choi, K You, W Sung
2008 16th European Signal Processing Conference, 1-5, 2008
122008
FPGA implementation of EM algorithm for 3D CT reconstruction
YK Choi, J Cong, D Wu
2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014
112014
Memory access optimized VLSI for 5000-word continuous speech recognition
K You, Y Choi, J Choi, W Sung
Journal of Signal Processing Systems 63 (1), 95-105, 2011
112011
HLS-based optimization and design space exploration for applications with variable loop bounds
Y Choi, J Cong
2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018
92018
Efficient GPU-based graph cuts for stereo matching
Y Choi, I Park
Proceedings of the IEEE Conference on Computer Vision and Pattern …, 2013
82013
Rapid cycle-accurate simulator for high-level synthesis
Y Chi, Y Choi, J Cong, J Wang
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
62019
Memory-efficient belief propagation in stereo matching on GPU
YK Choi, W Williem, IK Park
Proceedings of The 2012 Asia Pacific Signal and Information Processing …, 2012
52012
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization
Y Choi, Y Chi, J Wang, L Guo, J Cong
arXiv preprint arXiv:2010.06075, 2020
42020
CUDA implementation of belief propagation for stereo vision
Y Choi
13th International IEEE Conference on Intelligent Transportation Systems …, 2010
42010
HBM Connect: High-Performance HLS Interconnect for FPGA HBM
Y Choi, Y Chi, W Qiao, N Samardzic, J Cong
The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021
12021
Extending High-Level Synthesis for Task-Parallel Programs
Y Chi, L Guo, Y Choi, J Wang, J Cong
arXiv preprint arXiv:2009.11389, 2020
12020
FLASH: Fast, Parallel, and Accurate Simulator for HLS
YK Choi, Y Chi, J Wang, J Cong
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
12020
Performance Debugging Frameworks for FPGA High-Level Synthesis
Y Choi
UCLA, 2019
2019
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Articles 1–20