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Andres otero
Andres otero
Universidad Politécnica de Madrid- Centro de Electrónica Industrial
Verified email at upm.es
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Cited by
Cited by
Year
FPGA-Based High-Performance Embedded Systems for Adaptive Edge Computing in Cyber-Physical Systems: The ARTICo3 Framework
A Rodríguez, J Valverde, J Portilla, A Otero, T Riesgo, E De la Torre
Sensors 18 (6), 1877, 2018
912018
Using SRAM based FPGAs for power-aware high performance wireless sensor networks
J Valverde, A Otero, M Lopez, J Portilla, E de la Torre, T Riesgo
Sensors 12 (3), 2667-2692, 2012
752012
Self-reconfigurable evolvable hardware system for adaptive image processing
R Salvador, A Otero, J Mora, E de la Torre, T Riesgo, L Sekanina
IEEE transactions on computers 62 (8), 1481-1493, 2013
702013
Adaptable security in wireless sensor networks by using reconfigurable ECC hardware coprocessors
J Portilla, A Otero, E de la Torre, T Riesgo, O Stecklina, S Peter, ...
International Journal of Distributed Sensor Networks 2010, 2010
682010
Fault tolerance analysis and self-healing strategy of autonomous, evolvable hardware systems
R Salvador, A Otero, J Mora, E de la Torre, L Sekanina, T Riesgo
Reconfigurable Computing and FPGAs (ReConFig), 2011 International Conference …, 2011
602011
Dreams: A tool for the design of dynamically reconfigurable embedded and modular systems
A Otero, E de la Torre, T Riesgo
2012 International Conference on Reconfigurable Computing and FPGAs, 1-8, 2012
452012
A machine-learning-based distributed system for fault diagnosis with scalable detection quality in industrial IoT
R Marino, C Wisultschew, A Otero, JM Lanza-Gutierrez, J Portilla, ...
IEEE Internet of Things Journal 8 (6), 4339-4352, 2020
412020
Run-time reconfigurable MPSoC-based on-board processor for vision-based space navigation
A Pérez, A Rodríguez, A Otero, DG Arjona, A Jiménez-Peralo, ...
IEEE Access 8, 59891-59905, 2020
392020
Automatic generation of identical routing pairs for FPGA implemented DPL logic
W He, A Otero, E de la Torre, T Riesgo
2012 International Conference on Reconfigurable Computing and FPGAs, 1-6, 2012
332012
IMPRESS: automated tool for the implementation of highly flexible partial reconfigurable systems with Xilinx Vivado
R Zamacola, AG Martínez, J Mora, A Otero, E de La Torre
2018 International Conference on ReConFigurable Computing and FPGAs …, 2018
312018
A Modular Peripheral to Support Self-Reconfiguration in SoCs
A Otero, Á Morales-Cas, J Portilla, E de la Torre, T Riesgo
Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th …, 2010
292010
A fast Reconfigurable 2D HW core architecture on FPGAs for evolvable Self-Adaptive Systems
A Otero, R Salvador, J Mora, E de la Torre, T Riesgo, L Sekanina
Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, 336-343, 2011
272011
Evolvable 2D computing matrix model for intrinsic evolution in commercial FPGAs with native reconfiguration support
R Salvador, A Otero, J Mora, E de la Torre, T Riesgo, L Sekanina
Adaptive Hardware and Systems (AHS), 2011 NASA/ESA Conference on, 184-191, 2011
222011
A novel FPGA-based evolvable hardware system based on multiple processing arrays
Á Gallego, J Mora, A Otero, R Salvador, E de la Torre, T Riesgo
2013 IEEE International Symposium on Parallel & Distributed Processing …, 2013
192013
Implementation techniques for evolvable HW systems: virtual VS. dynamic reconfiguration
R Salvador, A Otero, J Mora, E de la Torre, T Riesgo, L Sekanina
Field Programmable Logic and Applications (FPL), 2012 22nd International …, 2012
172012
Dynamic reconfiguration under RTEMS for fault mitigation and functional adaptation in SRAM-based SoPCs for space systems
A Pérez, L Suriano, A Otero, E de la Torre
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS), 40-47, 2017
162017
A scalable evolvable hardware processing array
A Gallego, J Mora, A Otero, E de la Torre, T Riesgo
2013 International Conference on Reconfigurable Computing and FPGAs …, 2013
162013
Fast and compact evolvable systolic arrays on dynamically reconfigurable FPGAs
J Mora, A Otero, E de la Torre, T Riesgo
2015 10th International Symposium on Reconfigurable Communication-centric …, 2015
142015
On the automatic integration of hardware accelerators into FPGA-based embedded systems
C Pilato, A Cazzaniga, G Durelli, A Otero, D Sciuto, MD Santambrogio
22nd International Conference on Field Programmable Logic and Applications …, 2012
142012
Artificial vision on edge iot devices: A practical case for 3d data classification
C Wisultschew, A Otero, J Portilla, E de la Torre
2019 XXXIV Conference on Design of Circuits and Integrated Systems (DCIS), 1-7, 2019
132019
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Articles 1–20