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Danardono Antono
Danardono Antono
Mitsui & Co
Verified email at mitsui.com
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Year
1.27 Gb/s/pin 3mW/pin wireless superconnect (WSC) interface scheme
K Kanda, DD Antono, K Ishida, H Kawaguchi, T Kuroda, T Sakurai
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003
1882003
A 0.5-V 400-MHz, VDD-hoping processor with zero-VTH FD-SOI technology
H Kawaguchi
Int'l Solid-State Circuit Conference, Feb. 2003, 106-107, 2003
332003
A 1-ps resolution on-chip sampling oscilloscope with 64: 1 tunable sampling range based on ramp waveform division scheme
K Inagaki, D Antono, M Takamiya, S Kumashiro, T Sakurai
2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., 61-62, 2006
302006
Trends of on-chip interconnects in deep sub-micron VLSI
DD Antono, K Inagaki, H Kawaguchi, T Sakurai
IEICE transactions on electronics 89 (3), 392-394, 2006
52006
A 0.5 V, 400MHz, V/sub 00/-hopping processor with zero-V/sub TH/FD-SOI technology
H Kawaguchi, K Kanda, K Nose, S Hattori, D Dwi, D Antono, D Yamada, ...
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003
42003
RFID, Sebuah Teknologi Identifikasi Pengancam Privasi
DD Antono
Perhimpunan Pelajar Indonesia (PPI) Jepang Membuka Dunia Untuk Indonesia dan …, 2004
32004
Simple waveform model of inductive interconnects by delayed quadratic transfer function with application to scaling trend of inductive effects in VLSI's
DD Antono, K Inagaki, H Kawaguchi, T Sakurai
IEICE transactions on fundamentals of electronics, communications and …, 2006
22006
Inductance Effect on VLSI Interconnections
DD Antono
2001 年信学会ソ大論文集 (基礎 境界), Mar., 2001
22001
Closed-form expressions for crosstalk noise and worst-case delay on capacitively coupled distributed RC lines
H Kawaguchi, DD Antono, T Sakurai
IEICE transactions on fundamentals of electronics, communications and …, 2007
2007
Modeling and characterization of electrical behaviors of interconnects in deep sub-micron VLSI's
DD Antono
東京大学, 2006
2006
SA-1-3 Modeling of Inductive Interconnect Responses and Coupling Effects
AD Dwi, S Takayasu
電子情報通信学会ソサイエティ大会講演論文集 2003, " S-4", 2003
2003
Trends and Analysis of Power Distribution in VLSI Interconnects
Y Shin, DD Antono, T Sakurai
ISSCC 2003/SESSION 10/HIGH SPEED BUILDING BLOCKS/PAPER 10.7
K Kanda, DD Antono, K Ishida, H Kawaguchi, T Kuroda, T Sakurai
POWER CONSUMPTION DISTRIBUTION IN DSM INTERCONNECTS WITH INDUCTIVE EFFECTS
DD Antono, T Sakurai
ISSCC 2003/SESSION 6/LOW-POWER DIGITAL TECHNIQUES/PAPER 6.3
H Kawaguchi, K Kanda, K Nose, S Hattori, DD Antono, D Yamada, ...
POWER CONSUMPTION DISTRIBUTION IN DSM INTERCONNECTS WITH INDUCTIVE EFFECTS
DD Antono, T Sakurai
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