Fundamentals of Ge1− xSnx and SiyGe1− x-ySnx RPCVD epitaxy J Margetis, A Mosleh, SA Ghetmiri, S Al-Kabi, W Dou, W Du, N Bhargava, ... Materials Science in Semiconductor Processing 70, 38-43, 2017 | 51 | 2017 |
Fabrication, characterization, and analysis of Ge/GeSn heterojunction p-type tunnel transistors C Schulte-Braucks, R Pandey, RN Sajjad, M Barth, RK Ghosh, B Grisafe, ... IEEE Transactions on Electron Devices 64 (10), 4354-4362, 2017 | 40 | 2017 |
Performance benchmarking of p-type In0.65Ga0.35As/GaAs0.4Sb0.6 and Ge/Ge0.93Sn0.07 hetero-junction tunnel FETs R Pandey, C Schulte-Braucks, RN Sajjad, M Barth, RK Ghosh, B Grisafe, ... 2016 IEEE International Electron Devices Meeting (IEDM), 19.6. 1-19.6. 4, 2016 | 33 | 2016 |
Epitaxial GeSn: Impact of process conditions on material quality R Loo, Y Shimura, S Ike, A Vohra, T Stoica, D Stange, D Buca, D Kohen, ... Semiconductor Science and Technology 33 (11), 114010, 2018 | 29 | 2018 |
Very low temperature epitaxy of group-IV semiconductors for use in FinFET, stacked nanowires and monolithic 3D integration C Porret, A Hikavyy, JFG Granados, S Baudot, A Vohra, B Kunert, ... ECS Journal of Solid State Science and Technology 8 (8), P392, 2019 | 24 | 2019 |
200 V GaN-on-SOI smart power platform for monolithic GaN power ICs T Cosnier, O Syshchyk, B De Jaeger, K Geens, D Cingu, E Fabris, ... 2021 IEEE International Electron Devices Meeting (IEDM), 5.1. 1-5.1. 4, 2021 | 19 | 2021 |
Low temperature epitaxial growth of Ge: B and Ge0. 99Sn0. 01: B source/drain for Ge pMOS devices: in-situ and conformal B-doping, selectivity towards oxide and nitride with no … A Vohra, C Porret, D Kohen, S Folkersma, J Bogdanowicz, M Schaekers, ... Japanese Journal of Applied Physics 58 (SB), SBBA04, 2019 | 18 | 2019 |
Epitaxial buffer structures grown on 200 mm engineering substrates for 1200 V E-mode HEMT application A Vohra, K Geens, M Zhao, O Syshchyk, H Hahn, D Fahle, B Bakeroot, ... Applied Physics Letters 120 (26), 2022 | 16 | 2022 |
Evolution of phosphorus-vacancy clusters in epitaxial germanium A Vohra, A Khanam, J Slotte, I Makkonen, G Pourtois, R Loo, ... Journal of Applied Physics 125 (2), 2019 | 15 | 2019 |
High performance strained Germanium Gate All Around p-channel devices with excellent electrostatic control for sub-Jtlnm LG E Capogreco, H Arimura, L Witters, A Vohra, C Porret, R Loo, ... 2019 Symposium on VLSI Technology, T94-T95, 2019 | 14 | 2019 |
Enhanced B doping in CVD-grown GeSn: B using B δ-doping layers D Kohen, A Vohra, R Loo, W Vandervorst, N Bhargava, J Margetis, J Tolle Journal of Crystal Growth 483, 285-290, 2018 | 14 | 2018 |
Toward high-performance and reliable Ge channel devices for 2 nm node and beyond H Arimura, E Capogreco, A Vohra, C Porret, R Loo, E Rosseel, A Hikavyy, ... 2020 IEEE International Electron Devices Meeting (IEDM), 2.1. 1-2.1. 4, 2020 | 13 | 2020 |
Very low temperature epitaxy of group-IV semiconductors for use in FinFET, stacked nanowires and monolithic 3D integration C Porret, AY Hikavyy, JFG Granados, S Baudot, A Vohra, B Kunert, ... ECS Transactions 86 (7), 163, 2018 | 13 | 2018 |
Source/Drain Materials for Ge nMOS Devices: Phosphorus Activation in Epitaxial Si, Ge, Ge1− xSnx and SiyGe1− x− ySnx A Vohra, I Makkonen, G Pourtois, J Slotte, C Porret, E Rosseel, A Khanam, ... ECS Journal of Solid State Science and Technology 9 (4), 044010, 2020 | 12 | 2020 |
Heavily phosphorus doped germanium: Strong interaction of phosphorus with vacancies and impact of tin alloying on doping activation A Vohra, A Khanam, J Slotte, I Makkonen, G Pourtois, C Porret, R Loo, ... Journal of Applied Physics 125 (22), 2019 | 11 | 2019 |
Low‐Temperature Selective Growth of Heavily Boron‐Doped Germanium Source/Drain Layers for Advanced pMOS Devices C Porret, A Vohra, N Nakazaki, A Hikavyy, B Douhard, J Meersschaut, ... physica status solidi (a) 217 (3), 1900628, 2020 | 8 | 2020 |
1.2 kV enhancement-mode p-GaN gate HEMTs on 200 mm engineered substrates S Kumar, K Geens, A Vohra, D Wellekens, D Cingu, E Fabris, T Cosnier, ... IEEE Electron Device Letters, 2024 | 5 | 2024 |
Device optimization for 200V GaN-on-SOI Platform for Monolithicly Integrated Power Circuits O Syshchyk, T Cosnier, ZH Huang, D Cingu, D Wellekens, A Vohra, ... ESSDERC 2022-IEEE 52nd European Solid-State Device Research Conference …, 2022 | 5 | 2022 |
Semiconductor switch device and a method of making a semiconductor switch device MSM Al-Sa'di, JJTM Donkers, PHC Magnee, I Brunets, A Vohra, ... US Patent 10,566,423, 2020 | 5 | 2020 |
A new method to fabricate Ge nanowires: Selective lateral etching of GeSn: P/Ge multi-stacks C Porret, A Vohra, F Sebaai, B Douhard, A Hikavyy, R Loo Solid State Phenomena 282, 113-118, 2018 | 5 | 2018 |