| Durable transactional memory can scale with timestone RM Krishnan, J Kim, A Mathew, X Fu, A Demeri, C Min, S Kannan Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020 | 67 | 2020 |
| {TIPS}: Making volatile index structures persistent with {DRAM-NVMM} tiering RM Krishnan, WH Kim, X Fu, SK Monga, HW Lee, M Jang, A Mathew, ... 2021 USENIX Annual Technical Conference (USENIX ATC 21), 773-787, 2021 | 36 | 2021 |
| Mv-rlu: Scaling read-log-update with multi-versioning J Kim, A Mathew, S Kashyap, MK Ramanathan, C Min Proceedings of the Twenty-Fourth International Conference on Architectural …, 2019 | 33 | 2019 |
| HydraList: A scalable in-memory index using asynchronous updates and partial replication A Mathew, C Min Proceedings of the VLDB Endowment 13 (9), 1332-1345, 2020 | 24 | 2020 |
| Multicore Scalability Through Asynchronous Work A Mathew Virginia Tech, 2020 | | 2020 |
| Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers R Kogta, S Purini, A Mathew Proceedings of the 2016 ACM/SIGDA International Symposium on Field …, 2016 | | 2016 |
