フォロー
Adam Pyzyna
Adam Pyzyna
確認したメール アドレス: us.ibm.com
タイトル
引用先
引用先
Sharp reduction of contact resistivities by effective Schottky barrier lowering with silicides as diffusion sources
Z Zhang, F Pagette, C D'emic, B Yang, C Lavoie, Y Zhu, M Hopstaken, ...
IEEE Electron Device Letters 31 (7), 731-733, 2010
2822010
FinFET performance advantage at 22nm: An AC perspective
M Guillorn, J Chang, A Bryant, N Fuller, O Dokumaci, X Wang, J Newbury, ...
2008 Symposium on VLSI Technology, 12-13, 2008
1232008
Density scaling with gate-all-around silicon nanowire MOSFETs for the 10 nm node and beyond
S Bangsaruntip, K Balakrishnan, SL Cheng, J Chang, M Brink, I Lauer, ...
2013 IEEE international electron devices meeting, 20.2. 1-20.2. 4, 2013
1182013
Scaling of SOI FinFETs down to fin width of 4 nm for the 10nm technology node
JB Chang, M Guillorn, PM Solomon, CH Lin, SU Engelmann, A Pyzyna, ...
2011 Symposium on VLSI Technology-Digest of Technical Papers, 12-13, 2011
952011
Ultra low contact resistivities for CMOS beyond 10-nm node
Z Zhang, SO Koswatta, SW Bedell, A Baraskar, M Guillorn, ...
IEEE electron device letters 34 (6), 723-725, 2013
502013
Resistivity of copper interconnects beyond the 7 nm node
A Pyzyna, R Bruce, M Lofaro, H Tsai, C Witt, L Gignac, M Brink, M Guillorn, ...
2015 Symposium on VLSI Technology (VLSI Technology), T120-T121, 2015
312015
Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT∼ 7Å and scaled dimensions down …
P Hashemi, T Ando, K Balakrishnan, E Cartier, M Lofaro, JA Ott, J Bruley, ...
2016 IEEE Symposium on VLSI Technology, 1-2, 2016
252016
Low-temperature sidewall image transfer process using ALD metals, metal oxides and metal nitrides
M Brink, MA Guillorn, SU Engelmann, H Miyazoe, AM Pyzyna, JW Sleight
US Patent 9,437,443, 2016
222016
Trench silicide with self-aligned contact vias
JB Chang, MA Guillorn, F Liu, AM Pyzyna
US Patent 9,721,888, 2017
212017
Hydrogen silsesquioxane-based hybrid electron beam and optical lithography for high density circuit prototyping
M Guillorn, J Chang, N Fuller, J Patel, M Darnon, A Pyzyna, E Joseph, ...
Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 2009
212009
Quasiparticle tunneling as a probe of Josephson junction barrier and capacitor material in superconducting qubits
C Kurter, CE Murray, RT Gordon, BB Wymore, M Sandberg, RM Shelby, ...
npj Quantum Information 8 (1), 31, 2022
202022
Resistivity of copper interconnects at 28 nm pitch and copper cross-sectional area below 100 nm2
A Pyzyna, H Tsai, M Lofaro, L Gignac, H Miyazoe, R Bruce, CM Breslin, ...
2017 IEEE International Interconnect Technology Conference (IITC), 1-3, 2017
202017
SiGe HBTs in 90nm BiCMOS technology demonstrating 300GHz/420GHz fT/fMAX through reduced Rb and Ccb parasitics
RA Camillo-Castillo, QZ Liu, JW Adkisson, MH Khater, PB Gray, V Jain, ...
2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 227-230, 2013
192013
Electrode pair fabrication using directed self assembly of diblock copolymers
JB Chang, MA Guillorn, H Miyazoe, AM Pyzyna, H Tsai
US Patent 9,306,164, 2016
182016
CMOS compatible MIM decoupling capacitor with reliable sub-nm EOT high-k stacks for the 7 nm node and beyond
T Ando, E Cartier, P Jamison, A Pyzyna, S Kim, J Bruley, K Chung, ...
2016 IEEE International Electron Devices Meeting (IEDM), 9.4. 1-9.4. 4, 2016
122016
Disposable carbon-based template layer for formation of borderless contact structures
G Breyta, JB Chang, SU Engelmann, MA Guillorn, DP Klaus, AM Pyzyna
US Patent App. 13/585,337, 2014
112014
A 0.021 µm2 trigate SRAM cell with aggressively scaled gate and contact pitch
MA Guillorn, J Chang, A Pyzyna, S Engelmann, M Glodde, E Joseph, ...
2011 Symposium on VLSI Technology-Digest of Technical Papers, 64-65, 2011
112011
Thermal oxidation-induced strain in silicon nanobeams
AM Pyzyna, DR Clarke, NC MacDonald
17th IEEE International Conference on Micro Electro Mechanical Systems …, 2004
92004
Thin film deposition research and its impact on microelectronics scaling
C Cabral, C Lavoie, C Murray, A Pyzyna, K Rodbell
Journal of Vacuum Science & Technology A 38 (4), 2020
72020
Subtractive W contact and local interconnect co-integration (CLIC)
F Liu, B Fletcher, EA Joseph, Y Zhu, J Gonsalves, W Price, GM Fritz, ...
2013 IEEE International Interconnect Technology Conference-IITC, 1-3, 2013
72013
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