| Efficient Canny edge detection using a GPU K Ogawa, Y Ito, K Nakano 2010 First International Conference on Networking and Computing, 279-280, 2010 | 151 | 2010 |
| Implementations of a parallel algorithm for computing euclidean distance map in multicore processors and GPUs D Man, K Uda, H Ueyama, Y Ito, K Nakano International journal of networking and computing 1 (2), 260-276, 2011 | 77 | 2011 |
| An Efficient GPU Implementation of Ant Colony Optimization for the Traveling Salesman Problem. A Uchida, Y Ito, K Nakano ICNC, 94-102, 2012 | 74 | 2012 |
| Accelerating the dynamic programming for the matrix chain product on the GPU K Nishida, Y Ito, K Nakano 2011 Second International Conference on Networking and Computing, 320-326, 2011 | 63 | 2011 |
| Accelerating the CKY parsing using FPGAs JL Bordim, Y Ito, K Nakano IEICE Transactions on Information and Systems 86 (5), 803-810, 2003 | 63 | 2003 |
| Fast and accurate template matching using pixel rearrangement on the GPU A Uchida, Y Ito, K Nakano 2011 Second International Conference on Networking and Computing, 153-159, 2011 | 60 | 2011 |
| Fast ellipse detection algorithm using Hough transform on the GPU Y Ito, K Ogawa, K Nakano 2011 Second International Conference on Networking and Computing, 313-319, 2011 | 54 | 2011 |
| A GPU implementation of computing euclidean distance map with efficient memory access D Man, K Uda, Y Ito, K Nakano 2011 Second International Conference on Networking and Computing, 68-76, 2011 | 51 | 2011 |
| An RSA encryption hardware algorithm using a single DSP block and a single block RAM on the FPGA S Bo, K Kawakami, K Nakano, Y Ito International Journal of Networking and Computing 1 (2), 277-289, 2011 | 47 | 2011 |
| Processor, assembler, and compiler design education using an FPGA K Nakano, Y Ito 2008 14th IEEE International Conference on Parallel and Distributed Systems …, 2008 | 41 | 2008 |
| Instance-specific solutions for accelerating the CKY parsing of large context-free grammars JL Bordim, OH Ibarra, Y Ito, K Nakano International Journal of Foundations of Computer Science 15 (02), 403-415, 2004 | 41 | 2004 |
| Accelerating the dynamic programming for the optimal polygon triangulation on the gpu K Nishida, K Nakano, Y Ito Algorithms and Architectures for Parallel Processing: 12th International …, 2012 | 39 | 2012 |
| Accelerating ant colony optimisation for the travelling salesman problem on the GPU A Uchida, Y Ito, K Nakano International Journal of Parallel, Emergent and Distributed Systems 29 (4 …, 2014 | 31 | 2014 |
| ASCII art generation using the local exhaustive search on the GPU Y Takeuchi, D Takafuji, Y Ito, K Nakano Computing and Networking (CANDAR), 2013 First International Symposium on …, 2013 | 30 | 2013 |
| Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations A Kasagi, K Nakano, Y Ito Parallel Processing (ICPP), 2014 43rd International Conference on, 251-260, 2014 | 29 | 2014 |
| An Efficient Implementation of LZW Decompression in the FPGA X Zhou, Y Ito, K Nakano 2016 IEEE International Parallel and Distributed Processing Symposium …, 2016 | 28 | 2016 |
| Implementations of parallel computation of Euclidean distance map in multicore processors and GPUs D Man, K Uda, H Ueyama, Y Ito, K Nakano 2010 First International Conference on Networking and Computing, 120-127, 2010 | 28 | 2010 |
| A GPU implementation of dynamic programming for the optimal polygon triangulation Y Ito, K Nakano IEICE TRANSACTIONS on Information and Systems 96 (12), 2596-2603, 2013 | 27 | 2013 |
| A classification processor for a support vector machine with embedded DSP slices and block RAMs in the FPGA Y Ago, K Nakano, Y Ito 2013 IEEE 7th International Symposium on Embedded Multicore Socs, 91-96, 2013 | 26 | 2013 |
| Low-latency connected component labeling using an FPGA Y Ito, K Nakano International Journal of Foundations of Computer Science 21 (03), 405-425, 2010 | 26 | 2010 |
