| QUEST: A 7.49 TOPS multi-purpose log-quantized DNN inference engine stacked on 96MB 3D SRAM using inductive-coupling technology in 40nm CMOS K Ueyoshi, K Ando, K Hirose, S Takamaeda-Yamazaki, J Kadomoto, ... 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 216-218, 2018 | 104 | 2018 |
| An open source FPGA-optimized out-of-order RISC-V soft processor S Mashimo, A Fujita, R Matsuo, S Akaki, A Fukuda, T Koizumi, ... 2019 International Conference on Field-Programmable Technology (ICFPT), 63-71, 2019 | 43 | 2019 |
| A sensing technique for data glove using conductive fiber R Takada, J Kadomoto, B Shizuki Extended Abstracts of the 2019 CHI Conference on Human Factors in Computing …, 2019 | 17 | 2019 |
| Analytical thruchip inductive coupling channel design optimization LC Hsu, J Kadomoto, S Hasegawa, A Kosuge, Y Take, T Kuroda 2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 731-736, 2016 | 13 | 2016 |
| 10.1 A 6Gb/s 6pJ/b 5mm-distance non-contact interface for modular smartphones using two-fold transmission-line coupler and EMC-qualified pulse transceiver A Kosuge, S Ishizuka, J Kadomoto, T Kuroda 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 13 | 2015 |
| Design of shape-changeable chiplet-based computers using an inductively coupled wireless bus interface J Kadomoto, H Irie, S Sakai 2020 IEEE 38th International Conference on Computer Design (ICCD), 589-596, 2020 | 9 | 2020 |
| Wixi: An inter-chip wireless bus interface for shape-changeable chiplet-based computers J Kadomoto, H Irie, S Sakai 2019 IEEE 37th International Conference on Computer Design (ICCD), 100-108, 2019 | 9 | 2019 |
| An inductive-coupling bus with collision detection scheme using magnetic field variation for 3-D network-on-chips J Kadomoto, T Miyata, H Amano, T Kuroda 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), 41-44, 2016 | 9 | 2016 |
| Toward wirelessly cooperated shape-changing computing particles J Kadomoto, T Sasatani, K Narumi, N Usami, H Irie, S Sakai, Y Kawahara IEEE Pervasive Computing 20 (3), 9-17, 2021 | 8 | 2021 |
| A 1 Tb/s/mm2inductive-coupling side-by-side chip link S Hasegawa, J Kadomoto, A Kosuge, T Kuroda ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 469-472, 2016 | 8 | 2016 |
| A 6 Gb/s 6 pJ/b 5 mm-distance non-contact interface for modular smartphones using two-fold transmission line coupler and high EMC tolerant pulse transceiver A Kosuge, J Kadomoto, T Kuroda IEEE Journal of Solid-State Circuits 51 (6), 1446-1456, 2016 | 8 | 2016 |
| A high-performance out-of-order soft processor without register renaming S Mitsuno, J Kadomoto, T Koizumi, R Shioya, H Irie, S Sakai 2020 30th International Conference on Field-Programmable Logic and …, 2020 | 7 | 2020 |
| Compiling and optimizing real-world programs for STRAIGHT ISA T Koizumi, S Sugita, R Shioya, J Kadomoto, H Irie, S Sakai 2021 IEEE 39th International Conference on Computer Design (ICCD), 400-408, 2021 | 6 | 2021 |
| Vertical packet switching elevator network using inductive coupling ThruChip interface A Nomura, H Matsutani, T Kuroda, J Kadomoto, Y Matsushita, H Amano 2016 Fourth International Symposium on Computing and Networking (CANDAR …, 2016 | 6 | 2016 |
| An area-efficient out-of-order soft-core processor without register renaming J Kadomoto, T Koizumi, A Fukuda, R Matsuo, S Mashimo, A Fujita, ... 2018 International Conference on Field-Programmable Technology (FPT), 374-377, 2018 | 5 | 2018 |
| Escalator network for a 3D chip stack with inductive coupling ThruChip Interface A Nomura, Y Matsushita, J Kadomoto, H Matsutani, T Kuroda, H Amano International Journal of Networking and Computing 8 (1), 124-139, 2018 | 5 | 2018 |
| An inductively coupled wireless bus for chiplet-based systems J Kadomoto, S Mitsuno, H Irie, S Sakai 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC), 9-10, 2020 | 4 | 2020 |
| Multiport register file design for high-performance embedded cores J Kadomoto, H Irie, S Sakai 2021 IEEE 14th International Symposium on Embedded Multicore/Many-core …, 2021 | 3 | 2021 |
| A study of physical design guidelines in thruchip inductive coupling channel LC Hsu, J Kadomoto, S Hasegawa, A Kosuge, Y Take, T Kuroda IEICE Transactions on Fundamentals of Electronics, Communications and …, 2015 | 3 | 2015 |
| FPGA-based garbling accelerator with parallel pipeline processing R Oishi, J Kadomoto, H Irie, S Sakai IEICE TRANSACTIONS on Information and Systems 106 (12), 1988-1996, 2023 | 2 | 2023 |
