Takeshi Sugawara
Takeshi Sugawara
Verified email at uec.ac.jp
Title
Cited by
Cited by
Year
High-performance concurrent error detection scheme for AES hardware
A Satoh, T Sugawara, N Homma, T Aoki
International Workshop on Cryptographic Hardware and Embedded Systems, 100-112, 2008
792008
Fair and consistent hardware evaluation of fourteen round two SHA-3 candidates
M Knezevic, K Kobayashi, J Ikegami, S Matsuo, A Satoh, Ü Kocabas, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (5), 827-840, 2011
642011
An on-chip glitchy-clock generator for testing fault injection attacks
S Endo, T Sugawara, N Homma, T Aoki, A Satoh
Journal of Cryptographic Engineering 1 (4), 265, 2011
552011
High-speed pipelined hardware architecture for Galois counter mode
A Satoh, T Sugawara, T Aoki
International Conference on Information Security, 118-129, 2007
522007
High-performance hardware architectures for Galois counter mode
A Satoh, T Sugawara, T Aoki
IEEE Transactions on Computers 58 (7), 917-930, 2008
472008
On measurable side-channel leaks inside ASIC design primitives
T Sugawara, D Suzuki, M Saeki, M Shiozaki, T Fujino
International Conference on Cryptographic Hardware and Embedded Systems, 159-178, 2013
382013
Reversing stealthy dopant-level circuits
T Sugawara, D Suzuki, R Fujii, S Tawa, R Hori, M Shiozaki, T Fujino
International Workshop on Cryptographic Hardware and Embedded Systems, 112-126, 2014
362014
Minalpher v1
Y Sasaki, Y Todo, K Aoki, Y Naito, T Sugawara, Y Murakami, M Matsui, ...
CAESAR Round 1, 2014
342014
Biasing power traces to improve correlation power analysis attacks
Y Kim, T Sugawara, N Homma, T Aoki, A Satoh
First International Workshop on Constructive Side-Channel Analysis and c, 2010
312010
Non-invasive EMI-based fault injection attack against cryptographic modules
Y Hayashi, N Homma, T Sugawara, T Mizuki, T Aoki, H Sone
2011 IEEE International Symposium on Electromagnetic Compatibility, 763-767, 2011
292011
Development of side-channel attack standard evaluation environment
T Katashita, A Satoh, T Sugawara, N Homma, T Aoki
2009 European Conference on Circuit Theory and Design, 403-408, 2009
242009
Spectrum analysis on cryptographic modules to counteract side-channel attacks
T Sugawara, Y Hayashi, N Homma, T Mizuki, T Aoki, H Sone, A Satoh
EMC 9, 21-24, 2009
242009
High-performance ASIC Implementations of the 128-bit Block Cipher CLEFIA
T Sugawara, N Homma, T Aoki, A Satoh
2008 IEEE International Symposium on Circuits and Systems, 2925-2928, 2008
242008
Mechanism behind information leakage in electromagnetic analysis of cryptographic modules
T Sugawara, Y Hayashi, N Homma, T Mizuki, T Aoki, H Sone, A Satoh
International Workshop on Information Security Applications, 66-78, 2009
232009
Differential power analysis of AES ASIC implementations with various S-box circuits
T Sugawara, N Homma, T Aoki, A Satoh
2009 European Conference on Circuit Theory and Design, 395-398, 2009
202009
A high-resolution phase-based waveform matching and its application to side-channel attacks
N Homma, S Nagashima, T Sugawara, T Aoki, A Satoh
IEICE Transactions on Fundamentals of Electronics, Communications and c, 2008
192008
Development of an on-chip micro shielded-loop probe to evaluate performance of magnetic film to protect a cryptographic LSI from electromagnetic analysis
M Yamaguchi, H Toriduka, S Kobayashi, T Sugawara, N Hommaa, ...
2010 IEEE International Symposium on Electromagnetic Compatibility, 103-108, 2010
172010
Oscillator without a combinatorial loop and its threat to FPGA in data centre
T Sugawara, K Sakiyama, S Nashimoto, D Suzuki, T Nagatsuka
Electronics Letters 55 (11), 640-642, 2019
162019
An on-chip glitchyclock generator and its application to safe-error attack
S Endo, T Sugawara, N Homma, T Aoki, A Satoh
2nd International Workshop on Constructive Side-channel Analysis and Secure c, 2011
162011
A 286 F²/Cell Distributed Bulk-Current Sensor and Secure Flush Code Eraser Against Laser Fault Injection Attack on Cryptographic Processor
K Matsuda, T Fujii, N Shoji, T Sugawara, K Sakiyama, Y Hayashi, ...
IEEE Journal of Solid-State Circuits, 2018
15*2018
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Articles 1–20