João M. P. Cardoso

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	All	Since 2016
Citations	3950	1500
h-index	29	17
i10-index	88	33

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Co-authors

Pedro C. DinizINESC-IDVerified email at inesc-id.pt
João BispoFEUP/INESCTECVerified email at fe.up.pt
Tiago CarvalhoFaculdade de Engenharia da Universidade do PortoVerified email at fe.up.pt
Horacio NetoINESC-ID / IST, University of LisbonVerified email at inesc-id.pt
Diogo R. FerreiraInstituto Superior Técnico (IST) - Universidade de LisboaVerified email at tecnico.ulisboa.pt
Jose Gabriel de Figueiredo CoutinhoImperial College LondonVerified email at imperial.ac.uk
Markus WeinhardtProfessor, Osnabrück University of Applied SciencesVerified email at hs-osnabrueck.de
Wayne LukProfessor of Computer Engineering, Imperial College LondonVerified email at imperial.ac.uk
André C. SantosINESC-ID, Instituto Superior Técnico, Universidade Técnica de LisboaVerified email at ist.utl.pt
Cristina SilvanoFull Professor, Politecnico di MilanoVerified email at polimi.it
João Canas FerreiraINESC TEC and University of PortoVerified email at fe.up.pt
Jan MartinovicIT4Innovations, VSB-TU Ostrava, Head of Advanced Data Analysis and Simulations LabVerified email at vsb.cz
Gianluca PalermoAssociate Professor at Politecnico di MilanoVerified email at polimi.it
Koen BertelsQBee, University of PortoVerified email at qbee.eu
Marcio Merino FernandesUFSCar - Departamento de ComputaçãoVerified email at dc.ufscar.br
Davide GadioliPolitecnico di MilanoVerified email at polimi.it
Giovanni AgostaPolitecnico di MilanoVerified email at elet.polimi.it
Ricardo MenottiUniversidade Federal de São CarlosVerified email at ufscar.br
Erven RohouUniv Rennes, Inria, CNRS, IRISAVerified email at inria.fr
Andrea BartoliniAssistant Professor, University of BolognaVerified email at unibo.it

João M. P. Cardoso

Full Professor, Universidade do Porto, Porto, Portugal

Verified email at fe.up.pt - Homepage

Reconfigurable Computing FPGAs Non-Conventional Computing Platforms Compilers and High-Level Synthesis Domain-Specific Langu


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Preprocessing techniques for context recognition from accelerometer data D Figo, PC Diniz, DR Ferreira, JMP Cardoso Personal and Ubiquitous Computing 14 (7), 645-662, 2010	563	2010
Regular expression matching for reconfigurable packet inspection J Bispo, I Sourdis, JMP Cardoso, S Vassiliadis 2006 IEEE International Conference on Field Programmable Technology, 119-126, 2006	213	2006
Macro-based hardware compilation of Java/sup TM/bytecodes into a dynamic reconfigurable computing system JMP Cardoso, HC Neto Seventh Annual IEEE Symposium on Field-Programmable Custom Computing …, 1999	127	1999
Compiling for reconfigurable computing: A survey JMP Cardoso, PC Diniz, M Weinhardt ACM Computing Surveys (CSUR) 42 (4), 1-65, 2010	121	2010
XPP-VC: AC compiler with temporal partitioning for the PACT-XPP architecture JMP Cardoso, M Weinhardt International Conference on Field Programmable Logic and Applications, 864-874, 2002	119	2002
Regular expression matching in reconfigurable hardware I Sourdis, J Bispo, JMP Cardoso, S Vassiliadis Journal of Signal Processing Systems 51 (1), 99-121, 2008	103	2008
Providing user context for mobile and social networking applications AC Santos, JMP Cardoso, DR Ferreira, PC Diniz, P Chaínho Pervasive and Mobile Computing 6 (3), 324-341, 2010	96	2010
Method for processing data M Vorbach, A Nückel, F May, M Weinhardt, JMP Cardoso US Patent 7,657,877, 2010	94	2010
Method for processing data F May, A Nuckel, M Vorbach, M Weinhardt, J Cardoso US Patent App. 09/967,498, 2004	92	2004
LARA: an aspect-oriented programming language for embedded systems JMP Cardoso, T Carvalho, JGF Coutinho, W Luk, R Nobre, P Diniz, ... Proceedings of the 11th annual international conference on Aspect-oriented …, 2012	90	2012
Synthesis of regular expressions targeting fpgas: Current status and open issues J Bispo, I Sourdis, JMP Cardoso, S Vassiliadis International Workshop on Applied Reconfigurable Computing, 179-190, 2007	86	2007
Compilation for FPGA-based reconfigurable hardware JMP Cardoso, HC Neto IEEE Design & Test of Computers 20 (2), 65-75, 2003	81	2003
On combining temporal partitioning and sharing of functional units in compilation for reconfigurable architectures JMP Cardoso IEEE Transactions on Computers 52 (10), 1362-1375, 2003	70	2003
Novel algorithm combining temporal partitioning and sharing of functional units JMP Cardoso The 9th Annual IEEE Symposium on Field-Programmable Custom Computing …, 2001	70	2001
Compilation techniques for reconfigurable architectures JMP Cardoso, PC Diniz Springer Science & Business Media, 2011	69	2011
Compilation of Java™ Algorithms onto Reconfigurable Computing Systems with Exploitation of Operation-Level Parallelism JMP Cardoso Ph. D. Thesis, Universidade Tecnica de Lisboa (UTL), Lisbon, Portugal Oct …, 2000	64	2000
Reconfigurable computing: from FPGAs to hardware/software codesign J Cardoso, M Hübner Springer Science & Business Media, 2011	56	2011
A methodology to design FPGA-based PID controllers J Lima, R Menotti, JMP Cardoso, E Marques 2006 IEEE International Conference on Systems, Man and Cybernetics 3, 2577-2583, 2006	52	2006
Compilation and Temporal Partitioning for a Coarse-Grain Reconfigurable Architecture JMP Cardoso, M Weinhardt New Algorithms, Architectures and Applications for Reconfigurable Computing …, 2005	50	2005
A Real Time Gesture Recognition System for Mobile Robots. V Bonato, AK Sanches, MM Fernandes, JMP Cardoso, E do Valle Simões, ... ICINCO (2), 207-214, 2004	48	2004

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