フォロー
Ryota Yasudo
タイトル
引用先
引用先
Amorphica: 4-replica 512 fully connected spin 336MHz metamorphic annealer with programmable optimization strategy and compressed-spin-transfer multi-chip extension
K Kawamura, J Yu, D Okonogi, S Jimbo, G Inoue, A Hyodo, ...
2023 IEEE International Solid-State Circuits Conference (ISSCC), 42-44, 2023
152023
Adaptive bulk search: Solving quadratic unconstrained binary optimization problems on multiple GPUs
R Yasudo, K Nakano, Y Ito, M Tatekawa, R Katsuki, T Yazane, Y Inaba
Proceedings of the 49th International Conference on Parallel Processing, 1-11, 2020
142020
A work-time optimal parallel exhaustive search algorithm for the QUBO and the Ising model, with GPU implementation
M Tao, K Nakano, Y Ito, R Yasudo, M Tatekawa, R Katsuki, T Yazane, ...
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
132020
Designing high-performance interconnection networks with host-switch graphs
R Yasudo, M Koibuchi, K Nakano, H Matsutani, H Amano
IEEE Transactions on Parallel and Distributed Systems 30 (2), 315-330, 2018
132018
GPU-accelerated scalable solver with bit permutated cyclic-min algorithm for quadratic unconstrained binary optimization
R Yasudo, K Nakano, Y Ito, R Katsuki, Y Tabata, T Yazane, K Hamano
Journal of Parallel and Distributed Computing 167, 109-122, 2022
102022
Performance estimation for exascale reconfigurable dataflow platforms
R Yasudo, J Coutinho, A Varbanescu, W Luk, H Amano, T Becker
2018 International Conference on Field-Programmable Technology (FPT), 314-317, 2018
102018
Scalable networks-on-chip with elastic links demarcated by decentralized routers
R Yasudo, H Matsutani, M Koibuchi, H Amano, T Nakamura
IEEE Transactions on Computers 66 (4), 702-716, 2016
72016
Design of a low power NoC router using marching memory through type
R Yasudo, T Kagami, H Amano, Y Nakase, M Watanabe, T Oishi, ...
2014 Eighth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 111-118, 2014
72014
High‐throughput FPGA implementation for quadratic unconstrained binary optimization
H Kagawa, Y Ito, K Nakano, R Yasudo, Y Kawamata, R Katsuki, Y Tabata, ...
Concurrency and Computation: Practice and Experience 35 (14), e6565, 2023
62023
Graph-theoretic formulation of QUBO for scalable local search on GPUs
R Yasudo, K Nakano, Y Ito, Y Kawamata, R Katsuki, S Ozaki, T Yazane, ...
2022 IEEE International Parallel and Distributed Processing Symposium …, 2022
62022
Fully-pipelined architecture for simulated annealing-based QUBO solver on the FPGA
H Kagawa, Y Ito, K Nakano, R Yasudo, Y Kawamata, R Katsuki, Y Tabata, ...
2020 Eighth International Symposium on Computing and Networking (CANDAR), 39-48, 2020
62020
Folded bloom filter for high bandwidth memory, with gpu implementations
M Hayashikawa, K Nakano, Y Ito, R Yasudo
2019 Seventh International Symposium on Computing and Networking (CANDAR), 18-27, 2019
62019
Designing low‐diameter interconnection networks with multi‐ported host‐switch graphs
R Yasudo, K Nakano, M Koibuchi, H Matsutani, H Amano
Concurrency and Computation: Practice and Experience 35 (11), e6115, 2023
52023
Solving the sparse QUBO on multiple GPUs for simulating a quantum annealer
T Imanaga, K Nakano, R Yasudo, Y Ito, Y Kawamata, R Katsuki, S Ozaki, ...
2021 Ninth International Symposium on Computing and Networking (CANDAR), 19-28, 2021
52021
HiRy: An advanced theory on design of deadlock-free adaptive routing for arbitrary topologies
R Kawano, R Yasudo, H Matsutani, M Koibuchi, H Amano
2017 IEEE 23rd International Conference on Parallel and Distributed Systems …, 2017
52017
Efficient GPU implementation for solving the maximum independent set problem
T Imanaga, K Nakano, M Tao, R Yasudo, Y Ito, Y Kawamata, R Katsuki, ...
2020 Eighth International Symposium on Computing and Networking (CANDAR), 29-38, 2020
42020
Dual-plane isomorphic hypercube network
T Hosomi, R Yasudo, M Koibuchi, S Shimojo
Proceedings of the International Conference on High Performance Computing in …, 2020
32020
Order/radix problem: Towards low end-to-end latency interconnection networks
R Yasudo, M Koibuchi, K Nakano, H Matsutani, H Amano
2017 46th International Conference on Parallel Processing (ICPP), 322-331, 2017
32017
Simple iterative trial search for the maximum independent set problem optimized for the GPUs
T Imanaga, K Nakano, R Yasudo, Y Ito, Y Kawamata, R Katsuki, Y Tabata, ...
Concurrency and Computation: Practice and Experience 35 (14), e6681, 2023
22023
Efficient implementations of Bloom filter using block RAMs and DSP slices on the FPGA
T Wada, N Matsumura, R Yasudo, K Nakano, Y Ito
Concurrency and Computation: Practice and Experience 33 (12), e5475, 2021
22021
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