Hideharu Amano
Hideharu Amano
確認したメール アドレス: am.ics.keio.ac.jp
タイトル
引用先
引用先
A lightweight fault-tolerant mechanism for network-on-chip
M Koibuchi, H Matsutani, H Amano, TM Pinkston
Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008), 13-22, 2008
1742008
A case for random shortcut topologies for HPC interconnects
M Koibuchi, H Matsutani, H Amano, DF Hsu, H Casanova
2012 39th Annual International Symposium on Computer Architecture (ISCA …, 2012
1512012
WASMII: A data driven computer on a virtual hardware
XP Ling, H Amano
[1993] Proceedings IEEE Workshop on FPGAs for Custom Computing Machines, 33-42, 1993
1411993
Recursive diagonal torus: an interconnection network for massively parallel computers
Y Yang, A Funahashi, A Jouraku, H Nishi, H Amano, T Sueyoshi
IEEE Transactions on Parallel and Distributed Systems 12 (7), 701-715, 2001
139*2001
Prediction router: Yet another low latency on-chip router architecture
H Matsutani, M Koibuchi, H Amano, T Yoshinaga
2009 IEEE 15th International Symposium on High Performance Computer …, 2009
1192009
Run-time power gating of on-chip routers using look-ahead routing
H Matsutani, M Koibuchi, H Amano, D Wang
2008 Asia and South Pacific Design Automation Conference, 55-60, 2008
1192008
Feature selection with a measure of deviations from Poisson in text categorization
H Ogura, H Amano, M Kondo
Expert Systems with Applications 36 (3), 6826-6832, 2009
1142009
Long-term outcomes of operative versus nonoperative treatment for uncomplicated appendicitis
Y Tanaka, H Uchida, H Kawashima, M Fujiogi, S Takazawa, K Deie, ...
Journal of pediatric surgery 50 (11), 1893-1897, 2015
1052015
Recursive diagonal torus: an interconnection network for massively parallel computers
Y Yang, A Funahashi, A Jouraku, H Nishi, H Amano, T Sueyoshi
IEEE Transactions on Parallel and Distributed Systems 12 (7), 701-715, 2001
1032001
A survey on dynamically reconfigurable processors
H Amano
IEICE transactions on Communications 89 (12), 3179-3187, 2006
1012006
Ultra fine-grained run-time power gating of on-chip routers for cmps
H Matsutani, M Koibuchi, D Ikebuchi, K Usami, H Nakamura, H Amano
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 61-68, 2010
99*2010
Tightly-coupled multi-layer topologies for 3-D NoCs
H Matsutani, M Koibuchi, H Amano
2007 International Conference on Parallel Processing (ICPP 2007), 75-75, 2007
932007
WASMII: An MPLD with data-driven control on a virtual hardware
X Ling, H Amano
The Journal of Supercomputing 9 (3), 253-276, 1995
871995
Handbook of Energy-Aware and Green Computing, Volume 1
I Ahmad, S Ranka
CRC Press, 2012
812012
A scalable 3D heterogeneous multi-core processor with inductive-coupling thruchip interface
N Miura, Y Koizumi, E Sasaki, Y Take, H Matsutani, T Kuroda, H Amano, ...
2013 IEEE COOL Chips XVI, 1-3, 2013
762013
A fine-grain dynamic sleep control scheme in MIPS R3000
N Seki, L Zhao, J Kei, D Ikebuchi, Y Kojima, Y Hasegawa, H Amano, ...
2008 IEEE International Conference on Computer Design, 612-617, 2008
752008
L-turn routing: An adaptive routing in irregular networks
M Koibuchi, A Funahashi, A Jouraku, H Amano
International Conference on Parallel Processing, 2001., 383-392, 2001
752001
A scalable 3D heterogeneous multicore with an inductive ThruChip interface
N Miura, Y Koizumi, Y Take, H Matsutani, T Kuroda, H Amano, ...
IEEE Micro 33 (6), 6-15, 2013
72*2013
Ultra fine-grained run-time power gating of on-chip routers for cmps
H Matsutani, M Koibuchi, D Ikebuchi, K Usami, H Nakamura, H Amano
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 61-68, 2010
722010
RoMultiC: Fast and simple configuration data multicasting scheme for coarse grain reconfigurable devices
V Tunbunheng, M Suzuki, H Amano
Proceedings. 2005 IEEE International Conference on Field-Programmable …, 2005
702005
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論文 1–20