Lisa Edge
Lisa Edge
確認したメール アドレス: hrl.com
タイトル
引用先
引用先
Measurement of the band offsets between amorphous and silicon
LF Edge, DG Schlom, SA Chambers, E Cicerrella, JL Freeouf, ...
Applied Physics Letters 84 (5), 726-728, 2004
1942004
Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
K Cheng, A Khakifirooz, P Kulkarni, S Ponoth, J Kuss, D Shahrjerdi, ...
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
1582009
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
S Krishnan, U Kwon, N Moumen, MW Stoker, ECT Harley, S Bedell, ...
2011 International Electron Devices Meeting, 28.1. 1-28.1. 4, 2011
1092011
A 0.063 µm2FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
VS Basker, T Standaert, H Kawasaki, CC Yeh, K Maitra, T Yamashita, ...
2010 Symposium on VLSI Technology, 19-20, 2010
1092010
Suppression of subcutaneous oxidation during the deposition of amorphous lanthanum aluminate on silicon
LF Edge, DG Schlom, RT Brewer, YJ Chabal, JR Williams, SA Chambers, ...
Applied physics letters 84 (23), 4629-4631, 2004
1082004
High performance extremely thin SOI (ETSOI) hybrid CMOS with Si channel NFET and strained SiGe channel PFET
K Cheng, A Khakifirooz, N Loubet, S Luning, T Nagumo, M Vinet, Q Liu, ...
2012 International Electron Devices Meeting, 18.1. 1-18.1. 4, 2012
932012
Outdiffusion of La and Al from amorphous in direct contact with Si (001)
P Sivasubramani, MJ Kim, BE Gnade, RM Wallace, LF Edge, DG Schlom, ...
Applied Physics Letters 86 (20), 201901, 2005
882005
22 nm technology compatible fully functional 0.1 μm26T-SRAM cell
BS Haran, A Kumar, L Adam, J Chang, V Basker, S Kanakasabapathy, ...
2008 IEEE International Electron Devices Meeting, 1-4, 2008
842008
Fully depleted extremely thin SOI technology fabricated by a novel integration scheme featuring implant-free, zero-silicon-loss, and faceted raised source/drain
K Cheng, A Khakifirooz, P Kulkarni, S Kanakasabapathy, S Schmitz, ...
2009 Symposium on VLSI Technology, 212-213, 2009
782009
Conduction band-edge states associated with the removal of d-state degeneracies by the Jahn-Teller effect
G Lucovsky, CC Fulton, Y Zhang, Y Zou, J Luning, LF Edge, JL Whitten, ...
IEEE Transactions on Device and Materials Reliability 5 (1), 65-83, 2005
772005
Electrical characterization of amorphous lanthanum aluminate thin films grown by molecular-beam deposition on silicon
LF Edge, DG Schlom, P Sivasubramani, RM Wallace, B Holländer, ...
Applied physics letters 88 (11), 112907, 2006
752006
Ultra-thin-body and BOX (UTBB) fully depleted (FD) device integration for 22nm node and beyond
Q Liu, A Yagishita, N Loubet, A Khakifirooz, P Kulkarni, T Yamamoto, ...
2010 Symposium on VLSI Technology, 61-62, 2010
742010
Si-compatible candidates for high-κ dielectrics with the P b n m perovskite structure
S Coh, T Heeg, JH Haeni, MD Biegalski, J Lettieri, LF Edge, KE O’Brien, ...
Physical Review B 82 (6), 064101, 2010
582010
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
K Choi, H Jagannathan, C Choi, L Edge, T Ando, M Frank, P Jamison, ...
2009 Symposium on VLSI Technology, 138-139, 2009
552009
Circuit quantum electrodynamics architecture for gate-defined quantum dots in silicon
X Mi, JV Cady, DM Zajac, J Stehlik, LF Edge, JR Petta
Applied Physics Letters 110 (4), 043502, 2017
522017
High performance UTBB FDSOI devices featuring 20nm gate length for 14nm node and beyond
Q Liu, M Vinet, J Gimbert, N Loubet, R Wacquez, L Grenouillet, Y Le Tiec, ...
2013 IEEE International Electron Devices Meeting, 9.2. 1-9.2. 4, 2013
492013
Extended defects in epitaxial films grown on (111) Si
DO Klenov, LF Edge, DG Schlom, S Stemmer
Applied Physics Letters 86 (5), 051901, 2005
492005
Borderless contact for replacement gate employing selective deposition
LF Edge, BS Haran
US Patent 8,232,607, 2012
462012
Electronic structure of silicon interfaces with amorphous and epitaxial insulating oxides: Sc2O3, Lu2O3, LaLuO3
VV Afanas’ev, S Shamuilia, M Badylevich, A Stesmans, LF Edge, W Tian, ...
Microelectronic engineering 84 (9-10), 2278-2281, 2007
412007
Band alignment between (100) Si and amorphous , , and : Atomically abrupt versus interlayer-containing interfaces
VV Afanas’ ev, A Stesmans, LF Edge, DG Schlom, T Heeg, J Schubert
Applied physics letters 88 (3), 032104, 2006
412006
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