| Designing 2D and 3D network-on-chip architectures K Tatas, K Siozios, D Soudris, A Jantsch Springer, 2014 | 63 | 2014 |
| Architecture-level exploration of alternative interconnection schemes targeting 3d fpgas: A software-supported methodology K Siozios, A Bartzas, D Soudris International Journal of Reconfigurable Computing 2008, 2008 | 49 | 2008 |
| A heterogeneous multicore system on chip with run-time reconfigurable virtual FPGA architecture M Hubner, P Figuli, R Girardey, D Soudris, K Siozios, J Becker 2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011 | 47 | 2011 |
| Effective Performance Metrics for Evaluating Activity Recognition Methods. T van Kasteren, HÖ Alemdar, C Ersoy ARCS Workshops, 2011 | 43 | 2011 |
| Spartan: Developing a vision system for future autonomous space exploration robots I Kostavelis, L Nalpantidis, E Boukas, MA Rodrigalvarez, I Stamoulias, ... Journal of Field Robotics 31 (1), 107-140, 2014 | 33 | 2014 |
| Exploration of alternative topologies for application-specific 3d networks-on-chip A Bartzas, N Skalis, K Siozios, D Soudris Proc. of WASP 5, 43, 2007 | 30 | 2007 |
| A novel framework for exploring 3-d fpgas with heterogeneous interconnect fabric K Siozios, VF Pavlidis, D Soudris ACM Transactions on Reconfigurable Technology and Systems (TRETS) 5 (1), 1-23, 2012 | 24 | 2012 |
| DAGGER: A novel generic methodology for FPGA bitstream generation and its software tool implementation K Siozios, G Koutroumpezis, K Tatas, D Soudris, A Thanailakis 19th IEEE International Parallel and Distributed Processing Symposium, 4 pp., 2005 | 24 | 2005 |
| A novel methodology for temperature-aware placement and routing of FPGAs K Siozios, D Soudris IEEE Computer Society Annual Symposium on VLSI (ISVLSI'07), 55-60, 2007 | 21 | 2007 |
| An integrated framework for architecture level exploration of reconfigurable platform K Siozios, K Tatas, G Koutroumpezis, D Soudris, A Thanailakis International Conference on Field Programmable Logic and Applications, 2005 …, 2005 | 21 | 2005 |
| On supporting efficient partial reconfiguration with just-in-time compilation H Sidiropoulos, K Siozios, P Figuli, D Soudris, M Hubner 2012 IEEE 26th International Parallel and Distributed Processing Symposium …, 2012 | 20 | 2012 |
| A software-supported methodology for designing high-performance 3D FPGA architectures K Siozios, K Sotiriadis, VF Pavlidis, D Soudris 2007 IFIP International Conference on Very Large Scale Integration, 54-59, 2007 | 19 | 2007 |
| Dynamic memory management in vivado-hls for scalable many-accelerator architectures D Diamantopoulos, S Xydis, K Siozios, D Soudris International Symposium on Applied Reconfigurable Computing, 117-128, 2015 | 18 | 2015 |
| Exploring alternative 3D FPGA architectures: Design methodology and CAD tool support K Siozios, K Sotiriadis, VF Pavlidis, D Soudris 2007 International Conference on Field Programmable Logic and Applications …, 2007 | 17 | 2007 |
| Fast design space exploration environment applied on noc's for 3d-stacked mpsoc's A Richard, D Milojevic, F Robert, A Bartzas, A Papanikolaou, K Siozios, ... 23th International Conference on Architecture of Computing Systems 2010, 1-6, 2010 | 16 | 2010 |
| A high-level mapping algorithm targeting 3D NoC architectures with multiple vdd K Siozios, I Anagnostopoulos, D Soudris 2010 IEEE Computer Society Annual Symposium on VLSI, 444-445, 2010 | 15 | 2010 |
| A low-complexity control mechanism targeting smart thermostats P Danassis, K Siozios, C Korkas, D Soudris, E Kosmatopoulos Energy and Buildings 139, 340-350, 2017 | 14 | 2017 |
| A tabu-based partitioning and layer assignment algorithm for 3-D FPGAs K Siozios, D Soudris IEEE Embedded Systems Letters 3 (3), 97-100, 2011 | 14 | 2011 |
| A novel FPGA architecture and an integrated framework of CAD tools for implementing applications K Siozios, G Koutroumpezis, K Tatas, N Vassiliadis, V Kalenteridis, ... IEICE transactions on information and systems 88 (7), 1369-1380, 2005 | 14 | 2005 |
| An integrated FPGA design framework: Custom designed FPGA platform and application mapping toolset development V Kalenteridis, H Pournara, K Siozios, K Tatas, G Koytroympezis, ... 18th International Parallel and Distributed Processing Symposium, 2004 …, 2004 | 14 | 2004 |
Dimitrios SoudrisProfessor, Electrical & Computer Eng., National Technical Univ. of AthensVerified email at microlab.ntua.gr
