| Extraction of circuit models for substrate cross-talk T Smedes, NP Van Der Meijs, AJ van Genderen Proceedings of IEEE International Conference on Computer Aided Design (ICCAD …, 1995 | 124 | 1995 |
| Fast computation of substrate resistances in large circuits AJ van Genderen, NP Van der Meijs, T Smedes Proceedings ED&TC European Design and Test Conference, 560-565, 1996 | 82 | 1996 |
| Boundary element methods for 3D capacitance and substrate resistance calculations in inhomogeneous media in a VLSI layout verification package T Smedes, NP Van der Meijs, AJ Van Genderen Advances in Engineering Software 20 (1), 19-27, 1994 | 59 | 1994 |
| An efficient finite element method for submicron IC capacitance extraction NP Van der Meijs, AJ van Genderen Proceedings of the 26th ACM/IEEE Design Automation Conference, 678-681, 1989 | 53 | 1989 |
| Extracting simple but accurate RC models for VLSI interconnect AJ Van Genderen, NP Van Der Meijs 1988., IEEE International Symposium on Circuits and Systems, 2351-2354, 1988 | 48 | 1988 |
| SLS: An efficient switch-level timing simulator using min-max voltage waveforms AJ van Genderen Proc. VLSI 89 Conference, 79-88, 1989 | 34 | 1989 |
| Space-efficient extraction algorithms NP Van der Meijs, AJ Van Genderen Proc. IEEE 3rd European Design Automation Conference, 520-524, 1992 | 30 | 1992 |
| Reduced RC models for IC interconnections with coupling capacitances AJ van Genderen, NP Van der Meijs Proc. IEEE 3rd European Design Automation Conference, 132-136, 1992 | 25 | 1992 |
| Developing and implementing peak detection for real-time image registration M Ma, A Van Genderen, P Beukelman Proceedings of the 16th Annual Workshop on Circuits, Systems & Signal …, 2005 | 21 | 2005 |
| Space user’s manual NP Van der Meijs, AJ Van Genderen, F Beeftink, PJH Elias Delft University of Technology, The Netherlands, 1992 | 21 | 1992 |
| Using articulation nodes to improve the efficiency of finite-element based resistance extraction AJ van Genderen, NP Van der Meijs Proceedings of the 33rd annual Design Automation Conference, 758-763, 1996 | 19 | 1996 |
| An efficient algorithm for analysis of non-orthogonal layout NP van der Meijs, AJ van Genderen IEEE International Symposium on Circuits and Systems,, 47-52, 1989 | 19 | 1989 |
| Reduced models for the behavior of VLSI circuits AJ van Genderen Delft University Press, 1991 | 18 | 1991 |
| Switch level timing simulation PM Dewilde, AJ van Genderen, AC de Graaf Proc. ICCAD Conf, 182-184, 1985 | 18 | 1985 |
| Layout extraction of 3D models for interconnect and substrate parasitics T Smedes, NP Van Der Meijs, AJ Van Genderen, PJH Elias, ... ESSDERC'95: Proceedings of the 25th European Solid State Device Research …, 1995 | 16 | 1995 |
| Delayed Frontal Solution for Finite-Element based Resistance Extraction NP van der Meijs, AJ van Genderen Proceedings of the... Design Automation Conference, 273, 1995 | 16 | 1995 |
| Accurate and efficient layout-to-circuit extraction for high-speed MOS and bipolar/BiCMOS integrated circuits F Beeftink, AJ Van Genderen, NP Van Der Meijs Proceedings of ICCD'95 International Conference on Computer Design. VLSI in …, 1995 | 14 | 1995 |
| Deep-submicron ulsi parasitics extraction using space F Beeftink, AJ Van Genderen, NP Van der Meijs, J Poltz University of Technology, 1998 | 13 | 1998 |
| Space3d Capacitance Extraction User's Manual AJ van Genderen, NP van der Meijs Delft university of technology, 1997 | 13 | 1997 |
| SPACE, Layout to Circuit Extraction software module of the Nelsis IC Design System A van Genderen, N van der Meijs, F Beeftink, P Elias, U Geigenmuller, ... Delft University of Technology, 1996 | 13 | 1996 |
Nick van der MeijsDelft University of TechnologyVerified email at tudelft.nl
