Semiconductor storage device Y Fujisaki, S Hanzawa, K Kurotsuchi, N Matsuzaki, N Takaura US Patent 7,864,568, 2011 | 193 | 2011 |
Semiconductor integrated circuit device and method of manufacturing the same N Yamamoto, N Takaura, Y Matsui, N Matsuzaki, K Kurotsuchi, M Terao US Patent 7,667,218, 2010 | 174 | 2010 |
Cross-point phase change memory with 4F2 cell size driven by low-contact-resistivity poly-Si diode Y Sasago, M Kinoshita, T Morikawa, K Kurotsuchi, S Hanzawa, T Mine, ... 2009 Symposium on VLSI Technology, 24-25, 2009 | 162 | 2009 |
Oxygen-doped gesbte phase-change memory cells featuring 1.5 V/100-/spl mu/A standard 0.13/spl mu/m CMOS operations N Matsuzaki, K Kurotsuchi, Y Matsui, O Tonomura, N Yamamoto, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest …, 2005 | 119* | 2005 |
Phase change RAM operated with 1.5-V CMOS as low cost embedded memory K Osada, T Kawahara, R Takemura, N Kitai, N Takaura, N Matsuzaki, ... Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005 …, 2005 | 98 | 2005 |
Semiconductor integrated circuit device K Kurotsuchi, N Takaura, O Tonomura, M Terao, H Matsuoka, ... US Patent 7,123,535, 2006 | 87 | 2006 |
Semiconductor integrated circuit device N Takaura, H Matsuoka, M Terao, K Kurotsuchi, T Yamauchi US Patent 7,071,485, 2006 | 82 | 2006 |
Semiconductor storage device A Shima, Y Sasago, M Kinoshita, T Mine, N Takaura, T Morikawa, ... US Patent 8,169,819, 2012 | 69 | 2012 |
Memory device M Terao, N Takaura, K Kurotsuchi, H Matsuoka, T Yamauchi US Patent 7,335,907, 2008 | 62 | 2008 |
Semiconductor integrated device K Kurotsuchi, K Itoh, N Takaura, K Osada US Patent 7,443,721, 2008 | 61 | 2008 |
A GeSbTe phase-change memory cell featuring a tungsten heater electrode for low-power, highly stable, and short-read-cycle operations N Takaura, M Terao, K Kurotsuchi, T Yamauchi, O Tonomura, Y Hanaoka, ... IEEE International Electron Devices Meeting 2003, 37.2. 1-37.2. 4, 2003 | 61 | 2003 |
Semiconductor integrated circuit device N Takaura, H Matsuoka, M Terao, K Kurotsuchi, T Yamauchi US Patent 7,470,923, 2008 | 58 | 2008 |
Semiconductor integrated circuit device K Kurotsuchi, N Takaura, O Tonomura, M Terao, H Matsuoka, ... US Patent 7,489,552, 2009 | 57 | 2009 |
Memory device N Takaura, M Terao, H Matsuoka, K Kurotsuchi US Patent 7,834,337, 2010 | 56 | 2010 |
Ta2O5 interfacial layer between GST and W plug enabling low power operation of phase change memories Y Matsui, K Kurotsuchi, O Tonomura, T Morikawa, M Kinoshita, Y Fujisaki, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 52 | 2006 |
Non-volatile storage addressing using multiple tables K Kurotsuchi, S Miura US Patent 9,378,131, 2016 | 39 | 2016 |
Doped In-Ge-Te phase change memory featuring stable operation and good data retention T Morikawa, K Kurotsuchi, M Kinoshita, N Matsuzaki, Y Matsui, Y Fujisaki, ... 2007 IEEE International Electron Devices Meeting, 307-310, 2007 | 39 | 2007 |
Storage controller, storage device, storage system, and semiconductor storage device K Kurotsuchi, S Miura US Patent App. 14/905,232, 2016 | 38 | 2016 |
Semiconductor device M Terao, S Hanzawa, T Morikawa, K Kurotsuchi, R Takemura, N Takaura, ... US Patent 8,319,204, 2012 | 31 | 2012 |
Phase-change memory driven by poly-Si MOS transistor with low cost and high-programming gigabyte-per-second throughput Y Sasago, M Kinoshita, H Minemura, Y Anzai, M Tai, K Kurotsuchi, ... 2011 Symposium on VLSI Technology-Digest of Technical Papers, 96-97, 2011 | 28 | 2011 |