A 10-bit 80-MS/s decision-select successive approximation TDC in 65-nm CMOS H Chung, H Ishikuro, T Kuroda IEEE Journal of Solid-State Circuits 47 (5), 1232-1241, 2012 | 94 | 2012 |
A 7.5-GS/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65nm CMOS H Chung, A Rylyakov, ZT Deniz, J Bulzacchelli, GY Wei, D Friedman 2009 Symposium on VLSI Circuits, 268-269, 2009 | 67 | 2009 |
6W/25mm2 inductive power transfer for non-contact wafer-level testing A Radecki, H Chung, Y Yoshida, N Miura, T Shidei, H Ishikuro, T Kuroda 2011 IEEE International Solid-State Circuits Conference, 230-232, 2011 | 56 | 2011 |
10-fs-level synchronization of photocathode laser with RF-oscillator for ultrafast electron and X-ray sources H Yang, B Han, J Shin, D Hou, H Chung, IH Baek, YU Jeong, J Kim Scientific Reports 7 (1), 39966, 2017 | 35 | 2017 |
Design-space exploration of backplane receivers with high-speed ADCs and digital equalization H Chung, GY Wei 2009 IEEE Custom Integrated Circuits Conference, 555-558, 2009 | 20 | 2009 |
A 0.025–0.45 W 60%-efficiency inductive-coupling power transceiver with 5-bit dual-frequency feedforward control for non-contact memory cards H Chung, A Radecki, N Miura, H Ishikuro, T Kuroda IEEE journal of solid-state circuits 47 (10), 2496-2504, 2012 | 17 | 2012 |
A 0.5 V 10MHz-to-100MHz 0.47 μz power scalable AD-PLL in 40nm CMOS Y Hiraku, I Hayashi, H Chung, T Kuroda, H Ishikuro 2012 IEEE Asian Solid State Circuits Conference (A-SSCC), 33-36, 2012 | 13 | 2012 |
A 360-fs-time-resolution 7-bit stochastic time-to-digital converter with linearity calibration using dual time offset arbiters in 65-nm CMOS H Chung, M Hyun, J Kim IEEE Journal of Solid-State Circuits 56 (3), 940-949, 2020 | 12 | 2020 |
Attosecond electronic timing with rising edges of photocurrent pulses M Hyun, C Ahn, Y Na, H Chung, J Kim Nature Communications 11 (1), 3667, 2020 | 12 | 2020 |
An 128-phase PLL using interpolation technique H Chung, D Jeong, W Kim JSTS: Journal of Semiconductor Technology and Science 3 (4), 181-187, 2003 | 10 | 2003 |
A 12.5-Gbps, 7-bit transmit DAC with 4-tap LUT-based equalization in 0.13 μm CMOS H Chung, A Liu, GY Wei 2008 IEEE Custom Integrated Circuits Conference, 563-566, 2008 | 8 | 2008 |
ADC-based backplane receiver design-space exploration H Chung, GY Wei IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2013 | 5 | 2013 |
Femtosecond-precision electronic clock distribution in CMOS chips by injecting frequency comb-extracted photocurrent pulses M Hyun, H Chung, W Na, J Kim Nature Communications 14 (1), 2345, 2023 | 4 | 2023 |
A 7.5 GS/s flash ADC and a 10.24 GS/s time-interleaved ADC for backplane receivers in 65 nm CMOS H Chung, ZT Deniz, A Rylyakov, J Bulzacchelli, D Friedman, GY Wei Analog Integrated Circuits and Signal Processing 85, 299-310, 2015 | 3 | 2015 |
6 W/25 mm2 Wireless Power Transmission for Non-contact Wafer-Level Testing A Radecki, H Chung, Y Yoshida, N Miura, T Shidei, H Ishikuro, T Kuroda IEICE transactions on electronics 95 (4), 668-676, 2012 | 3 | 2012 |
Attosecond relative timing jitter between optical pulses and rising edges of photocurrent pulses M Hyun, Y Na, H Chung, J Kim 2019 Conference on Lasers and Electro-Optics (CLEO), 1-2, 2019 | 2 | 2019 |
ADC-Based Backplane Receivers: Motivations, Issues and Future H Chung JSTS: Journal of Semiconductor Technology and Science 16 (3), 300-311, 2016 | 2 | 2016 |
Simultaneous data and power transmission using nested clover coils Y Take, H Chung, N Miura, T Kuroda 17th Asia and South Pacific Design Automation Conference, 555-556, 2012 | 1 | 2012 |
Inductive-coupling interfaces for high-speed low-power proximity communications H Chung, T Kuroda 2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011 | 1 | 2011 |
Femtosecond-precision electronic clock distribution in CMOS chips with laser pulses M Hyun, H Chung, W Na, J Kim Optical Interconnects XXIV, PC1289202, 2024 | | 2024 |