フォロー
Masayuki Shimoda
Masayuki Shimoda
確認したメール アドレス: m.titech.ac.jp
タイトル
引用先
引用先
A demonstration of FPGA-based you only look once version2 (YOLOv2)
H Nakahara, M Shimoda, S Sato
2018 28th International Conference on Field Programmable Logic and …, 2018
262018
All binarized convolutional neural network and its implementation on an FPGA
M Shimoda, S Sato, H Nakahara
2017 International Conference on Field Programmable Technology (ICFPT), 291-294, 2017
262017
Mask RSA: end-to-end reinforcement learning-based routing and spectrum assignment in elastic optical networks
M Shimoda, T Tanaka
2021 European Conference on Optical Communication (ECOC), 1-4, 2021
252021
FPGA-based training accelerator utilizing sparseness of convolutional neural network
H Nakahara, Y Sada, M Shimoda, K Sayama, A Jinguji, S Sato
2019 29th International Conference on Field Programmable Logic and …, 2019
252019
GUINNESS: A GUI based binarized deep neural network framework for software programmers
H Nakahara, H Yonekawa, T Fujii, M Shimoda, S Sato
IEICE TRANSACTIONS on Information and Systems 102 (5), 1003-1011, 2019
212019
An FPGA implementation of real-time object detection with a thermal camera
M Shimoda, Y Sada, R Kuramochi, H Nakahara
2019 29th International Conference on Field Programmable Logic and …, 2019
162019
Filter-wise pruning approach to FPGA implementation of fully convolutional network for semantic segmentation
M Shimoda, Y Sada, H Nakahara
Applied Reconfigurable Computing: 15th International Symposium, ARC 2019 …, 2019
162019
An FPGA-based fine tuning accelerator for a sparse CNN
H Nakahara, A Jinguji, M Shimoda, S Sato
Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019
112019
A demonstration of the GUINNESS: A GUI based neural NEtwork SyntheSizer for an FPGA
H Nakahara, H Yonekawa, T Fujii, M Shimoda, S Sato
2017 27th International Conference on Field Programmable Logic and …, 2017
102017
FPGA-based inter-layer pipelined accelerators for filter-wise weight-balanced sparse fully convolutional networks with overlapped tiling
M Shimoda, Y Sada, H Nakahara
Journal of Signal Processing Systems 93 (5), 499-512, 2021
82021
Fast monocular depth estimation on an FPGA
Y Sada, N Soga, M Shimoda, A Jinguji, S Sato, H Nakahara
2020 IEEE International Parallel and Distributed Processing Symposium …, 2020
72020
A dataflow pipelining architecture for tile segmentation with a sparse MobileNet on an FPGA
Y Sada, M Shimoda, A Jinguji, H Nakahara
2019 International Conference on Field-Programmable Technology (ICFPT), 267-270, 2019
72019
A tri-state weight convolutional neural network for an FPGA: Applied to YOLOv2 object detector
H Nakahara, M Shimoda, S Sato
2018 International Conference on Field-Programmable Technology (FPT), 298-301, 2018
72018
Impact of operational mode selection and grooming policies on auxiliary graph-based multi-layer network planning
T Tanaka, M Shimoda
2021 European Conference on Optical Communication (ECOC), 1-4, 2021
52021
Fpga-based accurate pedestrian detection with thermal camera for surveillance system
R Kuramochi, M Shimoda, Y Sada, S Sato, H Nakahara
2019 International Conference on ReConFigurable Computing and FPGAs …, 2019
42019
SENTEI: Filter-Wise Pruning with Distillation towards Efficient Sparse Convolutional Neural Network Accelerators
M Shimoda, Y Sada, R Kuramochi, S Sato, H Nakahara
IEICE TRANSACTIONS on Information and Systems 103 (12), 2463-2470, 2020
32020
Power efficient object detector with an event-driven camera for moving object surveillance on an FPGA
M Shimoda, S Sato, H Nakahara
IEICE TRANSACTIONS on Information and Systems 102 (5), 1020-1028, 2019
32019
Demonstration of object detection for event-driven cameras on FPGAs and GPUs
M Shimoda, S Sato, H Nakahara
2018 28th International Conference on Field Programmable Logic and …, 2018
32018
Deep reinforcement learning-based spectrum assignment with multi-metric reward function and assignable boundary slot mask
M Shimoda, T Tanaka
Optoelectronics and Communications Conference, M4B. 3, 2021
22021
BCA Channel Routing to Minimize Wirelength for Generalized Channel Problem
Z Wang, M Shimoda, A Takahashi
2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2024
12024
現在システムで処理を実行できません。しばらくしてからもう一度お試しください。
論文 1–20