Takashi Ando
Takashi Ando
IBM T. J. Watson Research Center
確認したメール アドレス: us.ibm.com - ホームページ
タイトル
引用先
引用先
Ultimate Scaling of High-κ Gate Dielectrics: Higher-κ or Interfacial Layer Scavenging?
T Ando
Materials 5 (3), 478-500, 2012
1442012
A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications
S Krishnan, U Kwon, N Moumen, MW Stoker, ECT Harley, S Bedell, ...
2011 International Electron Devices Meeting, 28.1. 1-28.1. 4, 2011
1092011
High-performance high-κ/metal gates for 45nm CMOS and beyond with gate-first processing
M Chudzik, B Doris, R Mo, J Sleight, E Cartier, C Dewan, D Park, H Bu, ...
VLSI Technology, 2007 IEEE Symposium on, 194-195, 2007
1092007
Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling
E Cartier, A Kerber, T Ando, MM Frank, K Choi, S Krishnan, B Linder, ...
2011 International Electron Devices Meeting, 18.4. 1-18.4. 4, 2011
1082011
Semiconductor devices with varying threshold voltage and fabrication methods thereof
B Kannan, U Kwon, S Krishnan, T Ando, V Narayanan
US Patent 9,748,145, 2017
962017
Understanding mobility mechanisms in extremely scaled HfO2 (EOT 0.42 nm) using remote interfacial layer scavenging technique and Vt-tuning dipoles with gate-first process
T Ando, MM Frank, K Choi, C Choi, J Bruley, M Hopstaken, M Copel, ...
Electron Devices Meeting (IEDM), 2009 IEEE International, 1-4, 2009
922009
Solid-state imaging device, method for producing same, and camera
Y Maruyama, T Yamaguchi, T Ando, S Hiyama, Y Ohgishi
US Patent App. 11/677,645, 2007
922007
FinFET parasitic capacitance reduction using air gap
T Ando, JB Chang, SK Kanakasabapathy, P Kulkarni, TE Standaert, ...
US Patent 8,637,930, 2014
832014
22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
S Narasimha, P Chang, C Ortolland, D Fried, E Engbrecht, K Nummy, ...
2012 International Electron Devices Meeting, 3.3. 1-3.3. 4, 2012
832012
Physical origins of mobility degradation in extremely scaled SiO2/HfO2 gate stacks with La and Al induced dipoles
T Ando, M Copel, J Bruley, MM Frank, H Watanabe, V Narayanan
Applied Physics Letters 96 (13), 132904-132904-3, 2010
752010
FinFET parasitic capacitance reduction using air gap
T Ando, JB Chang, SK Kanakasabapathy, P Kulkarni, TE Standaert, ...
US Patent 8,637,384, 2014
712014
Scavenging metal stack for a high-k gate dielectric
T Ando, C Choi, MM Frank, V Narayanan
US Patent 7,989,902, 2011
592011
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
K Choi, H Jagannathan, C Choi, L Edge, T Ando, M Frank, P Jamison, ...
VLSI Technology, 2009 Symposium on, 138-139, 2009
552009
Signal and noise extraction from analog memory elements for neuromorphic computing
N Gong, T Idé, S Kim, I Boybat, A Sebastian, V Narayanan, T Ando
Nature communications 9 (1), 1-8, 2018
482018
Inversion thickness reduction in high-k gate stacks formed by replacement gate processes
T Ando, V Narayanan
US Patent App. 13/100,371, 2012
442012
High-performance and low-power CMOS device technologies featuring metal/high-k gate stacks with uniaxial strained silicon channels on (100) and (110) substrates
Y Tateshita, J Wang, K Nagano, T Hirano, Y Miyanami, T Ikuta, T Kataoka, ...
Electron Devices Meeting, 2006. IEDM'06. International, 1-4, 2006
422006
Solid-state imaging device, method for producing same, and camera
T Yamaguchi, Y Maruyama, T Ando, S Hiyama, Y Ohgishi
US Patent 9,000,493, 2015
39*2015
Scalable high-k dielectric gate stack
C Choi, T Ando, K Choi, V Narayanan
US Patent App. 11/928,391, 2009
372009
Enabling enhanced reliability and mobility for replacement gate planar and FinFET structures
T Ando, EA Cartier, K Choi, WL Lai, V Narayanan, R Ramachandran
US Patent 9,099,393, 2015
362015
Semiconductor device having dual metal gates and method of manufacture
U Kwon, SA Krishnan, T Ando, MP Chudzik, MM Frank, WK Henson, ...
US Patent 7,838,908, 2010
362010
現在システムで処理を実行できません。しばらくしてからもう一度お試しください。
論文 1–20