フォロー
Guru Venkataramani
Guru Venkataramani
Professor of Electrical and Computer Engineering, George Washington University
確認したメール アドレス: gwu.edu - ホームページ
タイトル
引用先
引用先
SESC simulator
J Renau
http://sesc. sourceforge. net, 2005
3552005
Flexitaint: A programmable accelerator for dynamic taint propagation
G Venkataramani, I Doudalis, Y Solihin, M Prvulovic
2008 IEEE 14th International Symposium on High Performance Computer …, 2008
2532008
Memtracker: Efficient and programmable support for memory access monitoring and debugging
G Venkataramani, B Roemer, Y Solihin, M Prvulovic
2007 IEEE 13th International Symposium on High Performance Computer …, 2007
1612007
Cc-hunter: Uncovering covert timing channels on shared processor hardware
J Chen, G Venkataramani
2014 47th Annual IEEE/ACM International Symposium on Microarchitecture, 216-228, 2014
1342014
Are coherence protocol states vulnerable to information leakage?
F Yao, M Doroslovacki, G Venkataramani
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
1232018
A comparative analysis of data center network architectures
F Yao, J Wu, G Venkataramani, S Subramaniam
2014 IEEE International Conference on Communications (ICC), 3106-3111, 2014
792014
Mobiqor: Pushing the envelope of mobile edge computing via quality-of-result optimization
Y Li, Y Chen, T Lan, G Venkataramani
2017 IEEE 37th International Conference on Distributed Computing Systems …, 2017
782017
Comprehensively and efficiently protecting the heap
M Kharbutli, X Jiang, Y Solihin, G Venkataramani, M Prvulovic
ACM SIGARCH Computer Architecture News 34 (5), 207-218, 2006
752006
Machine learning-based analysis of program binaries: A comprehensive study
H Xue, S Sun, G Venkataramani, T Lan
IEEE Access 7, 65889-65912, 2019
642019
Energy-aware writes to non-volatile main memory
J Chen, RC Chiang, HH Huang, G Venkataramani
ACM SIGOPS Operating Systems Review 45 (3), 48-52, 2012
582012
HARE++: Hardware Assisted Reverse Execution Revisited
I Doudalis, M Prvulovic
Georgia Institute of Technology, 1-8, 2011
522011
Prefetch-guard: Leveraging hardware prefetches to defend against cache timing channels
H Fang, SS Dayapule, F Yao, M Doroslovački, G Venkataramani
2018 IEEE International Symposium on Hardware Oriented Security and Trust …, 2018
472018
DFS covert channels on multi-core platforms
M Alagappan, J Rajendran, M Doroslovački, G Venkataramani
2017 IFIP/IEEE International Conference on Very Large Scale Integration …, 2017
462017
Covert timing channels exploiting non-uniform memory access based architectures
F Yao, G Venkataramani, M Doroslovački
Proceedings of the on Great Lakes Symposium on VLSI 2017, 155-160, 2017
462017
Statsym: vulnerable path discovery through statistics-guided symbolic execution
F Yao, Y Li, Y Chen, H Xue, T Lan, G Venkataramani
2017 47th Annual IEEE/IFIP International Conference on Dependable Systems …, 2017
432017
Damgate: Dynamic adaptive multi-feature gating in program binaries
Y Chen, T Lan, G Venkataramani
Proceedings of the 2017 Workshop on Forming an Ecosystem Around Software …, 2017
412017
WASP: Workload adaptive energy-latency optimization in server farms using server low-power states
F Yao, J Wu, S Subramaniam, G Venkataramani
2017 IEEE 10th International Conference on Cloud Computing (CLOUD), 171-178, 2017
412017
Toss: Tailoring online server systems through binary feature customization
Y Chen, S Sun, T Lan, G Venkataramani
Proceedings of the 2018 Workshop on Forming an Ecosystem Around Software …, 2018
402018
Jop-alarm: Detecting jump-oriented programming-based anomalies in applications
F Yao, J Chen, G Venkataramani
2013 IEEE 31st International Conference on Computer Design (ICCD), 467-470, 2013
382013
Simber: Eliminating redundant memory bound checks via statistical inference
H Xue, Y Chen, F Yao, Y Li, T Lan, G Venkataramani
ICT Systems Security and Privacy Protection: 32nd IFIP TC 11 International …, 2017
372017
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