| Scalable, sub 2μm pitch, Cu/SiCN to Cu/SiCN hybrid wafer-to-wafer bonding technology E Beyne, SW Kim, L Peng, N Heylen, J De Messemaeker, OO Okudur, ... 2017 IEEE International Electron Devices Meeting (IEDM), 32.4. 1-32.4. 4, 2017 | 119 | 2017 |
| Ultra-fine pitch 3D integration using face-to-face hybrid wafer bonding combined with a via-middle through-silicon-via process SW Kim, M Detalle, L Peng, P Nolmans, N Heylen, D Velenis, A Miller, ... 2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 1179-1185, 2016 | 57 | 2016 |
| Three-dimensional wafer stacking using Cu–Cu bonding for simultaneous formation of electrical, mechanical, and hermetic bonds CS Tan, L Peng, J Fan, H Li, S Gao IEEE Transactions on Device and Materials Reliability 12 (2), 194-200, 2012 | 46 | 2012 |
| Influence of composition of SiCN as interfacial layer on plasma activated direct bonding F Inoue, L Peng, S Iacovo, A Phommahaxay, P Verdonck, J Meersschaut, ... ECS Journal of Solid State Science and Technology 8 (6), P346, 2019 | 45 | 2019 |
| High-density 3-D interconnect of Cu–Cu contacts with enhanced contact resistance by self-assembled monolayer (SAM) passivation L Peng, H Li, DF Lim, S Gao, CS Tan IEEE Transactions on Electron Devices 58 (8), 2500-2506, 2011 | 42 | 2011 |
| First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers A Vandooren, J Franco, Z Wu, B Parvais, W Li, L Witters, A Walke, L Peng, ... 2018 IEEE International Electron Devices Meeting (IEDM), 7.1. 1-7.1. 4, 2018 | 38 | 2018 |
| Low temperature Cu-to-Cu bonding for wafer-level hermetic encapsulation of 3D microsystems J Fan, DF Lim, L Peng, KH Li, CS Tan Electrochemical and solid-state letters 14 (11), H470, 2011 | 36 | 2011 |
| Ultrafine Pitch (6) of Recessed and Bonded Cu–Cu Interconnects by Three-Dimensional Wafer Stacking L Peng, L Zhang, J Fan, HY Li, DF Lim, CS Tan IEEE electron device letters 33 (12), 1747-1749, 2012 | 34 | 2012 |
| Permanent wafer bonding in the low temperature by using various plasma enhanced chemical vapour deposition dielectrics SW Kim, L Peng, A Miller, G Beyer, E Beyne, CS Lee 2015 International 3D Systems Integration Conference (3DIC), TS7. 2.1-TS7. 2.4, 2015 | 33 | 2015 |
| Influence of Si wafer thinning processes on (sub) surface defects F Inoue, A Jourdain, L Peng, A Phommahaxay, J De Vos, KJ Rebibis, ... Applied Surface Science 404, 82-87, 2017 | 32 | 2017 |
| Advances in sicn-sicn bonding with high accuracy wafer-to-wafer (w2w) stacking technology L Peng, SW Kim, S Iacovo, F Inoue, A Phommahaxay, E Sleeckx, ... 2018 IEEE International Interconnect Technology Conference (IITC), 179-181, 2018 | 31 | 2018 |
| Enabling ultra-thin die to wafer hybrid bonding for future heterogeneous integrated systems A Phommahaxay, S Suhard, P Bex, S Iacovo, J Slabbekoorn, F Inoue, ... 2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 607-613, 2019 | 28 | 2019 |
| 3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525° C with improved reliability A Vandooren, J Franco, B Parvais, Z Wu, L Witters, A Walke, W Li, L Peng, ... 2018 IEEE Symposium on VLSI Technology, 69-70, 2018 | 28 | 2018 |
| Wafer-level hermetic packaging of 3D microsystems with low-temperature Cu-to-Cu thermo-compression bonding and its reliability J Fan, L Peng, KH Li, CS Tan Journal of micromechanics and microengineering 22 (10), 105004, 2012 | 24 | 2012 |
| 3-D sequential stacked planar devices featuring low-temperature replacement metal gate junctionless top devices with improved reliability A Vandooren, J Franco, B Parvais, Z Wu, L Witters, A Walke, W Li, L Peng, ... IEEE Transactions on Electron Devices 65 (11), 5165-5171, 2018 | 23 | 2018 |
| Thermal reliability of fine pitch Cu-Cu bonding with self assembled monolayer (SAM) passivation for Wafer-on-Wafer 3D-Stacking L Peng, HY Li, DF Lim, S Gao, CS Tan 2011 IEEE 61st Electronic Components and Technology Conference (ECTC), 22-26, 2011 | 23 | 2011 |
| Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling A Vandooren, L Witters, J Franco, A Mallik, B Parvais, Z Wu, A Walke, ... 2018 International Conference on IC Design & Technology (ICICDT), 145-148, 2018 | 17 | 2018 |
| Wafer-on-wafer stacking by bumpless Cu–Cu bonding and its electrical characteristics CS Tan, L Peng, HY Li, DF Lim, S Gao IEEE electron device letters 32 (7), 943-945, 2011 | 17 | 2011 |
| Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications A Vandooren, Z Wu, A Khaled, J Franco, B Parvais, W Li, L Witters, ... 2019 Symposium on VLSI Technology, T56-T57, 2019 | 15 | 2019 |
| W2W permanent stacking for 3D system integration L Peng, SW Kim, M Soules, M Gabriel, M Zoberbier, E Sleeckx, H Struyf, ... 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC), 1-4, 2014 | 15 | 2014 |
