| Trace signal selection for visibility enhancement in post-silicon validation X Liu, Q Xu 2009 Design, Automation & Test in Europe Conference & Exhibition, 1338-1343, 2009 | 361 | 2009 |
| On reusing test access mechanisms for debug data transfer in soc post-silicon validation X Liu, Q Xu Asian Test Symposium, 2008. ATS'08. 17th, 303-308, 2008 | 240 | 2008 |
| On Signal Selection for Visibility Enhancement in Trace-Based Post-Silicon Validation X Liu, Q Xu IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND …, 2012 | 49 | 2012 |
| On capture power-aware test data compression for scan-based testing J Li, X Liu, Y Zhang, Y Hu, X Li, Q Xu 2008 IEEE/ACM International Conference on Computer-Aided Design, 67-72, 2008 | 45 | 2008 |
| On signal tracing in post-silicon validation Q Xu, X Liu 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 262-267, 2010 | 40 | 2010 |
| On simultaneous shift-and capture-power reduction in linear decompressor-based test compression environment X Liu, Q Xu 2009 International Test Conference, 1-10, 2009 | 40 | 2009 |
| Interconnection fabric design for tracing signals in post-silicon validation X Liu, Q Xu Design Automation Conference, 2009. DAC'09. 46th ACM/IEEE, 352-357, 2009 | 34 | 2009 |
| On Signal Tracing for Debugging Speedpath-Related Electrical Errors in Post-Silicon Validation X Liu, Q Xu Test Symposium (ATS), 2010 19th IEEE Asian, 243-248, 2010 | 28 | 2010 |
| On multiplexed signal tracing for post-silicon validation X Liu, Q Xu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 20 | 2013 |
| Layout-aware pseudo-functional testing for critical paths considering power supply noise effects X Liu, Y Zhang, F Yuan, Q Xu 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 19 | 2010 |
| Pseudo-functional testing for small delay defects considering power supply noise effects F Yuan, X Liu, Q Xu 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 34-39, 2011 | 18 | 2011 |
| On multiplexed signal tracing for post-silicon debug X Liu, Q Xu 2011 Design, Automation & Test in Europe, 1-6, 2011 | 16 | 2011 |
| On X-variable filling and flipping for capture-power reduction in linear decompressor-based test compression environment X Liu, Q Xu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 15 | 2012 |
| A generic framework for scan capture power reduction in fixed-length symbol-based test compression environment X Liu, Q Xu 2009 Design, Automation & Test in Europe Conference & Exhibition, 1494-1499, 2009 | 12 | 2009 |
| Hybrid scan-based delay testing technique for compact and high fault coverage test set S Wang, X Liu, ST Chakradhar US Patent 7,313,743, 2007 | 12 | 2007 |
| Trace-based post-silicon validation for VLSI circuits X Liu, Q Xu Springer International Publishing, 2014 | 9 | 2014 |
| On efficient silicon debug with flexible trace interconnection fabric X Liu, Q Xu 2012 IEEE International Test Conference, 1-9, 2012 | 7 | 2012 |
| X-tracer: a reconfigurable X-tolerant trace compressor for silicon debug F Yuan, X Liu, Q Xu Proceedings of the 49th Annual Design Automation Conference, 555-560, 2012 | 6 | 2012 |
| A generic framework for scan capture power reduction in test compression environment X Liu, F Yuan, Q Xu 2008 IEEE International Test Conference, 2008 | 5 | 2008 |
| ATPG and DFT algorithms for delay fault testing X Liu Virginia Polytechnic Institute and State University, 2004 | 5 | 2004 |
Feng YuanPostdoctoral Fellow of Computer Science and Engineering, The Chinese University of Hong KongVerified email at cse.cuhk.edu.hk
