Hiroshi KAWAGUCHI
Hiroshi KAWAGUCHI
Verified email at godzilla.kobe-u.ac.jp - Homepage
TitleCited byYear
A large-area, flexible pressure sensor matrix with organic field-effect transistors for artificial skin applications
T Someya, T Sekitani, S Iba, Y Kato, H Kawaguchi, T Sakurai
Proceedings of the National Academy of Sciences 101 (27), 9966-9970, 2004
16952004
Conformable, flexible, large-area networks of pressure and thermal sensors with organic transistor active matrixes
T Someya, Y Kato, T Sekitani, S Iba, Y Noguchi, Y Murase, H Kawaguchi, ...
Proceedings of the National Academy of Sciences 102 (35), 12321-12325, 2005
12532005
A reduced clock-swing flip-flop (RCSFF) for 63% power reduction
H Kawaguchi, T Sakurai
IEEE Journal of Solid-State Circuits 33 (5), 807-811, 1998
3781998
A super cut-off CMOS (SCCMOS) scheme for 0.5-V supply voltage with picoampere stand-by current
H Kawaguchi, K Nose, T Sakurai
IEEE Journal of Solid-State Circuits 35 (10), 1498-1501, 2000
2472000
Integration of organic FETs with organic photodiodes for a large area, flexible, and lightweight sheet image scanners
T Someya, Y Kato, S Iba, Y Noguchi, T Sekitani, H Kawaguchi, T Sakurai
IEEE transactions on electron devices 52 (11), 2502-2511, 2005
2402005
High mobility of pentacene field-effect transistors with polyimide gate dielectric layers
Y Kato, S Iba, R Teramoto, T Sekitani, T Someya, H Kawaguchi, T Sakurai
Applied physics letters 84 (19), 3789-3791, 2004
2172004
Sheet-type Braille displays by integrating organic field-effect transistors and polymeric actuators
Y Kato, T Sekitani, M Takamiya, M Doi, K Asaka, T Sakurai, T Someya
IEEE transactions on electron devices 54 (2), 202-209, 2007
1862007
1.27 Gb/s/pin 3mW/pin wireless superconnect (WSC) interface scheme
K Kanda, DD Antono, K Ishida, H Kawaguchi, T Kuroda, T Sakurai
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003
1772003
Design impact of positive temperature dependence on drain current in sub-1-V CMOS VLSIs
K Kanda, K Nose, H Kawaguchi, T Sakurai
IEEE Journal of Solid-State Circuits 36 (10), 1559-1564, 2001
1652001
An area-conscious low-voltage-oriented 8T-SRAM design under DVS environment
Y Morita, H Fujiwara, H Noguchi, Y Iguchi, K Nii, H Kawaguchi, ...
2007 IEEE Symposium on VLSI Circuits, 256-257, 2007
1632007
Cut-and-paste customization of organic FET integrated circuit and its application to electronic artificial skin
H Kawaguchi, T Someya, T Sekitani, T Sakurai
IEEE Journal of Solid-State Circuits 40 (1), 177-185, 2005
1512005
Zigzag super cut-off CMOS (ZSCCMOS) block activation with self-adaptive voltage level controller: An alternative to clock-gating scheme in leakage dominant era
KS Min, H Kawaguchi, T Sakurai
2003 IEEE International Solid-State Circuits Conference, 2003. Digest of …, 2003
1392003
Boosted Gate MOS (BGMOS): Device/circuit cooperation scheme to achieve leakage-free giga-scale integration
T Inukai, M Takamiya, K Nose, H Kawaguchi, T Hiramoto, T Sakurai
Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No …, 2000
1392000
Delay and noise formulas for capacitively coupled distributed RC lines
H Kawaguchi, T Sakurai
Proceedings of 1998 Asia and South Pacific Design Automation Conference, 35-43, 1998
1101998
Which is the best dual-port SRAM in 45-nm process technology?—8T, 10T single end, and 10T differential—
H Noguchi, S Okumura, Y Iguchi, H Fujiwara, Y Morita, K Nii, ...
2008 IEEE International Conference on Integrated Circuit Design and …, 2008
1082008
Control of threshold voltage of organic field-effect transistors with double-gate structures
S Iba, T Sekitani, Y Kato, T Someya, H Kawaguchi, M Takamiya, T Sakurai, ...
Applied Physics Letters 87 (2), 023509, 2005
1072005
Dynamic leakage cut-off scheme for low-voltage SRAM's
H Kawaguchi, Y Itaka, T Sakurai
1998 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No …, 1998
1061998
V/sub TH/-hopping scheme to reduce subthreshold leakage for low-power processors
K Nose, M Hirabayashi, H Kawaguchi, S Lee, T Sakurai
IEEE Journal of Solid-State Circuits 37 (3), 413-419, 2002
1042002
Architectural study of HOG feature extraction processor for real-time object detection
K Mizuno, Y Terachi, K Takagi, S Izumi, H Kawaguchi, M Yoshimoto
2012 IEEE Workshop on Signal Processing Systems, 197-202, 2012
1022012
Low-power high-speed level shifter design for block-level dynamic voltage scaling environment
CQ Tran, H Kawaguchi, T Sakurai
2005 International Conference on Integrated Circuit Design and Technology …, 2005
932005
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