Kalle Tammemae
Kalle Tammemae
Professor of Computer Engineering, Tallinn University of Technology
Verified email at ieee.org - Homepage
Title
Cited by
Cited by
Year
The benefits of self-awareness and attention in fog and mist computing
JS Preden, K Tammemäe, A Jantsch, M Leier, A Riid, E Calis
Computer 48 (7), 37-45, 2015
1222015
Reconfigurable multiplier for Virtex FPGA family
J Poldre, K Tammemäe
International Workshop on Field Programmable Logic and Applications, 359-364, 1999
241999
FPGA-based fault emulation of synchronous sequential circuits
P Ellervee, J Raik, K Tammemäe, RJ Ubar
IET Computers & Digital Techniques 1 (2), 70-76, 2007
202007
A framework of awareness for artificial subjects
A Jantsch, K Tammemäe
Proceedings of the 2014 International Conference on Hardware/Software …, 2014
192014
Automatic FSM synthesis for low-power mixed synchronous/asynchronous implementation
B Oelmann, K Tammemäe, M Kruus, M O'Nils
VLSI Design 12 (2), 167-186, 2001
152001
Modular exponent realization on FPGAs
J Põldre, K Tammemäe, M Mandre
International Workshop on Field Programmable Logic and Applications, 336-347, 1998
121998
Self-aware fog computing in private and secure spheres
K Tammemäe, A Jantsch, A Kuusik, JS Preden, E Õunapuu
Fog Computing in the Internet of Things, 71-99, 2018
112018
Open Source On-Chip Logic Analyzer for FPGA-s
L Ehrenpreis, P Ellervee, K Tammemae
2006 International Biennial Baltic Electronics Conference, 1-4, 2006
102006
A modular 6LoWPAN-based wireless sensor body area network for health-monitoring applications
Y Le Moullec, Y Lecat, P Annus, R Land, A Kuusik, M Reidla, T Hollstein, ...
Signal and Information Processing Association Annual Summit and Conference …, 2014
82014
Self-aware cyber-physical systems
K Bellman, C Landauer, N Dutt, L Esterle, A Herkersdorf, A Jantsch, ...
ACM Transactions on Cyber-Physical Systems 4 (4), 1-26, 2020
62020
Hierarchical temporal memory implementation on FPGA using LFSR based spatial pooler address space generator
M Kerner, K Tammemäe
2017 IEEE 20th International Symposium on Design and Diagnostics of …, 2017
52017
HDL-s and FPGA-s in Digital Design Education
P Ellervee, U Reinsalu, A Arhipov, E Ivask, K Tammemae, T Evartson, ...
2008 19th EAEEIE Annual Conference, 37-41, 2008
52008
Evaluating fault emulation on FPGA
P Ellervee, J Raik, V Tihhomirov, K Tammemäe
International Conference on Field Programmable Logic and Applications, 354-363, 2004
52004
VLSI system level codesign toolkit AKKA
K Tammemäe, M O’Nils, A Tornemo, H Tenhunen
14th IEEE Norchip Conference, 196-202, 1996
51996
Flexible codesign target architecture for early prototyping of CMIST systems
K Tammemäe, M O'Nils, A Hemani
International Workshop on Field Programmable Logic and Applications, 193-199, 1996
41996
Akka: A tool-kit for cosynthesis and prototyping
K Tammemae, M O'Nils, A Jantsch, A Hemani
IET Digital Library, 1996
41996
Clock Manipulation for Heterogeneous Emulation Environment
P Ellervee, A Arhipov, K Tammemae
2006 NORCHIP, 213-216, 2006
32006
Abstraction levels: Y-chart
K Tammemäe, P Ellervee
3
Environment for FPGA-based fault emulation
P Ellervee, J Raik, K Tammemäe, R Ubar
Proc. of the Estonian Academy of Sciences. Engineering 12, 323-335, 2006
22006
Computer architectures
K Tammemäe
Lecture notes, 2001
22001
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