フォロー
Paul V. Gratz
Paul V. Gratz
Department of Electrical and Computer Engineering, Texas A&M University
確認したメール アドレス: tamu.edu - ホームページ
タイトル
引用先
引用先
Scaling to the end of silicon with EDGE architectures
D Burger, SW Keckler, KS McKinley, M Dahlin, LK John, C Lin, CR Moore, ...
Computer 37 (7), 44-55, 2004
5432004
Regional congestion awareness for load balance in networks-on-chip
P Gratz, B Grot, SW Keckler
High Performance Computer Architecture, 2008. HPCA 2008. IEEE 14th …, 2008
4942008
Implementation and evaluation of on-chip network architectures
P Gratz, C Kim, R McDonald, SW Keckler, D Burger
Computer Design, 2006. ICCD 2006. International Conference on, 477-484, 2006
2572006
Distributed microarchitectural protocols in the TRIPS prototype processor
K Sankaralingam, R Nagarajan, R McDonald, R Desikan, S Drolia, ...
Microarchitecture, 2006. MICRO-39. 39th Annual IEEE/ACM International …, 2006
2312006
Path confidence based lookahead prefetching
J Kim, SH Pugsley, PV Gratz, ALN Reddy, C Wilkerson, Z Chishti
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
1652016
On-chip interconnection networks of the TRIPS chip
P Gratz, C Kim, K Sankaralingam, H Hanson, P Shivakumar, SW Keckler, ...
Micro, IEEE 27 (5), 41-50, 2007
1492007
GCA: Global congestion awareness for load balance in networks-on-chip
M Ramakrishna, VK Kodati, PV Gratz, A Sprintson
IEEE Transactions on Parallel and Distributed Systems 27 (7), 2022-2035, 2015
1032015
LumiNOC: A power-efficient, high-performance, photonic network-on-chip
C Li, M Browning, PV Gratz, S Palermo
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
102*2014
Running PARSEC 2.1 on M5
M Gebhart, J Hestness, E Fatehi, P Gratz, SW Keckler
The University of Texas at Austin, Department of Computer Science, Tech. Rep, 2009
1002009
An evaluation of the TRIPS computer system
M Gebhart, BA Maher, KE Coons, J Diamond, P Gratz, M Marino, ...
ACM SIGARCH Computer Architecture News 37 (1), 1-12, 2009
922009
Perceptron-based prefetch filtering
E Bhatia, G Chacon, S Pugsley, E Teran, PV Gratz, DA Jiménez
Proceedings of the 46th International Symposium on Computer Architecture, 1-13, 2019
892019
In-network monitoring and control policy for DVFS of CMP networks-on-chip and last level caches
X Chen, Z Xu, H Kim, P Gratz, J Hu, M Kishinevsky, U Ogras
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (4 …, 2013
852013
Dynamic voltage and frequency scaling for shared resources in multicore processor designs
X Chen, Z Xu, H Kim, PV Gratz, J Hu, M Kishinevsky, U Ogras, R Ayoub
Proceedings of the 50th Annual Design Automation Conference, 1-7, 2013
812013
Bandwidth-efficient on-chip interconnect designs for GPGPUs
H Jang, J Kim, P Gratz, KH Yum, EJ Kim
Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015
792015
Up by their bootstraps: Online learning in artificial neural networks for CMP uncore power management
JY Won, X Chen, P Gratz, J Hu, V Soteriou
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
732014
Implementation and evaluation of a dynamically routed processor operand network
P Gratz, K Sankaralingam, H Hanson, P Shivakumar, R McDonald, ...
Proceedings of the First International Symposium on Networks-on-Chip, 7-17, 2007
682007
Realistic workload characterization and analysis for networks-on-chip design
PV Gratz, SW Keckler
The 4th Workshop on Chip Multiprocessor Memory Systems and Interconnects …, 2010
672010
METHOD AND APPARATUS FOR CONGESTION-AWARE ROUTING IN A COMPUTER INTERCONNECTION NETWORK
P Gratz, B Grot, SW Keckler
US Patent App. 20,100/211,718, 2010
652010
Kill the program counter: Reconstructing program behavior in the processor cache hierarchy
J Kim, E Teran, PV Gratz, DA Jiménez, SH Pugsley, C Wilkerson
ACM SIGPLAN Notices 52 (4), 737-749, 2017
632017
Use it or lose it: Wear-out and lifetime in future chip multiprocessors
H Kim, A Vitkovskiy, PV Gratz, V Soteriou
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
562013
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