Systematic design of RSA processors based on high-radix Montgomery multipliers A Miyamoto, N Homma, T Aoki, A Satoh IEEE Transactions on very large scale integration (VLSI) Systems 19 (7 …, 2010 | 89 | 2010 |

Collision-based power analysis of modular exponentiation using chosen-message pairs N Homma, A Miyamoto, T Aoki, A Satoh, A Shamir International Workshop on Cryptographic Hardware and Embedded Systems, 15-29, 2008 | 79 | 2008 |

High-performance concurrent error detection scheme for AES hardware A Satoh, T Sugawara, N Homma, T Aoki International Workshop on Cryptographic Hardware and Embedded Systems, 100-112, 2008 | 77 | 2008 |

High-resolution side-channel attack using phase-based waveform matching N Homma, S Nagashima, Y Imai, T Aoki, A Satoh International Workshop on Cryptographic Hardware and Embedded Systems, 187-200, 2006 | 72 | 2006 |

Comparative power analysis of modular exponentiation algorithms N Homma, A Miyamoto, T Aoki, A Satoh, A Samir IEEE Transactions on Computers 59 (6), 795-807, 2009 | 65 | 2009 |

Fair and consistent hardware evaluation of fourteen round two SHA-3 candidates M Knezevic, K Kobayashi, J Ikegami, S Matsuo, A Satoh, Ü Kocabas, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (5), 827-840, 2011 | 63 | 2011 |

An on-chip glitchy-clock generator for testing fault injection attacks S Endo, T Sugawara, N Homma, T Aoki, A Satoh Journal of Cryptographic Engineering 1 (4), 265, 2011 | 51 | 2011 |

Analysis of electromagnetic information leakage from cryptographic devices with different physical structures YI Hayashi, N Homma, T Mizuki, T Aoki, H Sone, L Sauvage, JL Danger IEEE Transactions on Electromagnetic Compatibility 55 (3), 571-580, 2012 | 46 | 2012 |

A threat for tablet pcs in public space: Remote visualization of screen images using em emanation Y Hayashi, N Homma, M Miura, T Aoki, H Sone Proceedings of the 2014 ACM SIGSAC Conference on Computer and Communications …, 2014 | 39 | 2014 |

Graph-based evolutionary design of arithmetic circuits D Chen, T Aoki, N Homma, T Terasaki, T Higuchi IEEE Transactions on Evolutionary Computation 6 (1), 86-100, 2002 | 38 | 2002 |

Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques O Meynard, D Réal, F Flament, S Guilley, N Homma, JL Danger 2011 Design, Automation & Test in Europe, 1-6, 2011 | 31 | 2011 |

Biasing power traces to improve correlation power analysis attacks Y Kim, T Sugawara, N Homma, T Aoki, A Satoh First international workshop on constructive side-channel analysis and …, 2010 | 30 | 2010 |

DPA using phase-based waveform matching against random-delay countermeasure S Nagashima, N Homma, Y Imai, T Aoki, A Satoh 2007 IEEE International Symposium on Circuits and Systems, 1807-1810, 2007 | 29 | 2007 |

Non-invasive EMI-based fault injection attack against cryptographic modules Y Hayashi, N Homma, T Sugawara, T Mizuki, T Aoki, H Sone 2011 IEEE International Symposium on Electromagnetic Compatibility, 763-767, 2011 | 28 | 2011 |

Application of symbolic computer algebra to arithmetic circuit verification Y Watanabe, N Homma, T Aoki, T Higuchi 2007 25th International Conference on Computer Design, 25-32, 2007 | 28 | 2007 |

Highly Efficient Inversion Circuit Based on Redundant GF Arithmetic and Its Application to AES Design R Ueno, N Homma, Y Sugawara, Y Nogami, T Aoki International Workshop on Cryptographic Hardware and Embedded Systems, 63-80, 2015 | 26 | 2015 |

An efficient countermeasure against fault sensitivity analysis using configurable delay blocks S Endo, Y Li, N Homma, K Sakiyama, K Ohta, T Aoki 2012 Workshop on Fault Diagnosis and Tolerance in Cryptography, 95-102, 2012 | 26 | 2012 |

Evolutionary design of arithmetic circuits T Aoki, N Homma, T Higuchi IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 1999 | 26 | 1999 |

Spectrum analysis on cryptographic modules to counteract side-channel attacks T Sugawara, Y Hayashi, N Homma, T Mizuki, T Aoki, H Sone, A Satoh EMC 9, 21-24, 2009 | 25 | 2009 |

Development of side-channel attack standard evaluation environment T Katashita, A Satoh, T Sugawara, N Homma, T Aoki 2009 European Conference on Circuit Theory and Design, 403-408, 2009 | 24 | 2009 |