フォロー
Fumihiro Inoue
Fumihiro Inoue
確認したメール アドレス: ynu.ac.jp
タイトル
引用先
引用先
Formation of electroless barrier and seed layers in a high aspect ratio through-Si vias using Au nanoparticle catalyst for all-wet Cu filling technology
F Inoue, T Shimizu, T Yokoyama, H Miyake, K Kondo, T Saito, T Hayashi, ...
Electrochimica Acta 56 (17), 6245-6250, 2011
692011
Hybrid 14nm FinFET - Silicon Photonics Technology for Low-Power Tb/s/mm2 Optical I/O
M Rakowski, Y Ban, P De Heyn, N Pantano, B Snyder, S Balakrishnan, ...
2018 IEEE Symposium on VLSI Technology, 221-222, 2018
652018
Influence of composition of SiCN as interfacial layer on plasma activated direct bonding
F Inoue, L Peng, S Iacovo, A Phommahaxay, P Verdonck, J Meersschaut, ...
ECS Journal of Solid State Science and Technology 8 (6), P346, 2019
642019
Electroless Cu deposition on atomic layer deposited Ru as novel seed formation process in through-Si vias
F Inoue, H Philipsen, A Radisic, S Armini, Y Civale, P Leunissen, ...
Electrochimica Acta 100, 203-211, 2013
642013
Perfect conformal deposition of electroless Cu for high aspect ratio through-Si vias
F Inoue, Y Harada, M Koyanagi, T Fukushima, K Yamamoto, S Tanaka, ...
Electrochemical and Solid-State Letters 12 (10), H381, 2009
502009
Advances in sicn-sicn bonding with high accuracy wafer-to-wafer (w2w) stacking technology
L Peng, SW Kim, S Iacovo, F Inoue, A Phommahaxay, E Sleeckx, ...
2018 IEEE International Interconnect Technology Conference (IITC), 179-181, 2018
412018
First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers
A Vandooren, J Franco, Z Wu, B Parvais, W Li, L Witters, A Walke, L Peng, ...
2018 IEEE International Electron Devices Meeting (IEDM), 7.1. 1-7.1. 4, 2018
392018
Influence of Si wafer thinning processes on (sub) surface defects
F Inoue, A Jourdain, L Peng, A Phommahaxay, J De Vos, KJ Rebibis, ...
Applied Surface Science 404, 82-87, 2017
392017
Electroless copper bath stability monitoring with UV-Vis spectroscopy, pH, and mixed potential measurements
F Inoue, H Philipsen, A Radisic, S Armini, Y Civale, S Shingubara, ...
Journal of The Electrochemical Society 159 (7), D437, 2012
372012
Enabling ultra-thin die to wafer hybrid bonding for future heterogeneous integrated systems
A Phommahaxay, S Suhard, P Bex, S Iacovo, J Slabbekoorn, F Inoue, ...
2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 607-613, 2019
332019
3D stacking using bump-less process for sub 10um pitch interconnects
J Derakhshandeh, I De Preter, C Gerets, L Hou, N Heylen, E Beyne, ...
2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 128-133, 2016
322016
Highly adhesive electroless barrier/Cu-seed formation for high aspect ratio through-Si vias
F Inoue, T Shimizu, H Miyake, R Arima, T Ito, H Seki, Y Shinozaki, ...
Microelectronic engineering 106, 164-167, 2013
302013
3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525° C with improved reliability
A Vandooren, J Franco, B Parvais, Z Wu, L Witters, A Walke, W Li, L Peng, ...
2018 IEEE Symposium on VLSI Technology, 69-70, 2018
282018
Origin of Voids at the SiO2/SiO2 and SiCN/SiCN Bonding Interface Using Positron Annihilation Spectroscopy and Electron Spin Resonance
F Nagano, F Inoue, A Phommahaxay, L Peng, F Chancerel, H Naser, ...
ECS Journal of Solid State Science and Technology 12 (3), 033002, 2023
252023
Area-selective electroless deposition of Cu for hybrid bonding
F Inoue, S Iacovo, Z El-Mekki, SW Kim, H Struyf, E Beyne
IEEE Electron Device Letters 42 (12), 1826-1829, 2021
252021
Void formation mechanism related to particles during wafer-to-wafer direct bonding
F Nagano, S Iacovo, A Phommahaxay, F Inoue, F Chancerel, H Naser, ...
ECS Journal of Solid State Science and Technology 11 (6), 063012, 2022
242022
Film characterization of low-temperature silicon carbon nitride for direct bonding applications
F Nagano, S Iacovo, A Phommahaxay, F Inoue, E Sleeckx, G Beyer, ...
ECS Journal of Solid State Science and Technology 9 (12), 123011, 2020
232020
10 and 7 μm pitch thermo-compression solder joint, using a novel solder pillar and metal spacer process
J Derakhshandeh, G Capuz, V Cherman, F Inoue, I De Preter, L Hou, ...
2020 IEEE 70th Electronic Components and Technology Conference (ECTC), 617-622, 2020
222020
Characterization of extreme Si thinning process for wafer-to-wafer stacking
F Inoue, A Jourdain, J De Vos, E Sleeckx, E Beyne, J Patel, O Ansell, ...
2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2095-2102, 2016
222016
Advanced dicing technologies for combination of wafer to wafer and collective die to wafer direct bonding
F Inoue, A Phommahaxay, A Podpod, S Suhard, H Hoshino, B Moeller, ...
2019 IEEE 69th Electronic Components and Technology Conference (ECTC), 437-445, 2019
212019
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