| MTTrans: Cross-domain object detection with mean teacher transformer J Yu, J Liu, X Wei, H Zhou, Y Nakata, D Gudovskiy, T Okuno, J Li, ... European Conference on Computer Vision, 629-645, 2022 | 51 | 2022 |
| Energy-efficient Spin-Transfer Torque RAM cache exploiting additional all-zero-data flags J Jung, Y Nakata, M Yoshimoto, H Kawaguchi International symposium on quality electronic design (ISQED), 216-222, 2013 | 35 | 2013 |
| 7T SRAM enabling low-energy simultaneous block copy S Okumura, S Yoshimoto, K Yamaguchi, Y Nakata, H Kawaguchi, ... IEEE Custom Integrated Circuits Conference 2010, 1-4, 2010 | 20 | 2010 |
| Bit error rate estimation in SRAM considering temperature fluctuation Y Kagiyama, S Okumura, K Yanagida, S Yoshimoto, Y Nakata, S Izumi, ... Thirteenth International Symposium on Quality Electronic Design (ISQED), 516-519, 2012 | 14 | 2012 |
| Mapping method, localization method, robot system, and robot Y Nakata, K Takeuchi, M Saito, N Harada, S Matsui, K Wakasugi US Patent 10,549,430, 2020 | 13 | 2020 |
| Efficient Deweahter Mixture-of-Experts with Uncertainty-Aware Feature-Wise Linear Modulation R Zhang, Y Luo, J Liu, H Yang, Z Dong, D Gudovskiy, T Okuno, Y Nakata, ... Proceedings of the AAAI Conference on Artificial Intelligence 38 (15), 16812 …, 2024 | 9 | 2024 |
| RandomNet: Towards fully automatic neural architecture design for multimodal learning S Alletto, S Huang, V Francois-Lavet, Y Nakata, G Rabusseau arXiv preprint arXiv:2003.01181, 2020 | 9 | 2020 |
| Information processing apparatus, vehicle, information processing method, running control method, and map updating method S Ohyama, Y Nakata, T Yamaguchi US Patent 10,935,385, 2021 | 8 | 2021 |
| Map production method, mobile robot, and map production system K Takeuchi, Y Nakata, M Saito, N Harada, S Matsui, K Wakasugi US Patent 10,006,772, 2018 | 8 | 2018 |
| Model-based fault injection for failure effect analysis—evaluation of dependable sram for vehicle control units Y Nakata, Y Ito, Y Sugure, S Oho, Y Takeuchi, S Okumura, H Kawaguchi, ... 2011 IEEE/IFIP 41st International Conference on Dependable Systems and …, 2011 | 8 | 2011 |
| 5-V operation variation-aware word-enhancing cache architecture using 7T/14T hybrid SRAM Y Nakata, S Okumura, H Kawaguchi, M Yoshimoto Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010 | 8 | 2010 |
| Scalable parallel processing for H. 264 encoding application to multi/many-core processor Y Takeuchi, Y Nakata, H Kawaguchi, M Yoshimoto 2010 International Conference on Intelligent Control and Information …, 2010 | 8 | 2010 |
| Concurrent misclassification and out-of-distribution detection for semantic segmentation via energy-based normalizing flow D Gudovskiy, T Okuno, Y Nakata Uncertainty in Artificial Intelligence, 745-755, 2023 | 5 | 2023 |
| 256-KB associativity-reconfigurable cache with 7T/14T SRAM for aggressive DVS down to 0.57 V J Jung, Y Nakata, S Okumura, H Kawaguchi, M Yoshimoto 2011 18th IEEE International Conference on Electronics, Circuits, and …, 2011 | 5 | 2011 |
| Failure modes and effects analysis using virtual prototyping system with microcontroller model for automotive control system Y Sugure, Y Ito, Y Nakata, Y Takeuchi, H Kawaguchi, M Yoshimoto, S Oho IFAC Proceedings Volumes 46 (21), 562-563, 2013 | 4 | 2013 |
| A process-variation-adaptive network-on-chip with variable-cycle routers Y Nakata, Y Takeuchi, H Kawaguchi, M Yoshimoto 2011 14th Euromicro Conference on Digital System Design, 801-804, 2011 | 4 | 2011 |
| Vecaf: Vlm-empowered collaborative active finetuning with training objective awareness R Zhang, Z Cai, H Yang, Z Liu, D Gudovskiy, T Okuno, Y Nakata, ... arXiv preprint arXiv:2401.07853, 2024 | 3 | 2024 |
| Reconfiguring cache associativity: Adaptive cache design for wide-range reliable low-voltage operation using 7T/14T SRAM J Jung, Y Nakata, S Okumura, H Kawaguchi, M Yoshimoto IEICE transactions on electronics 96 (4), 528-537, 2013 | 3 | 2013 |
| SRAM failure injection to a vehicle ECU and its behavior evaluation Y Takeuchi, Y Nakata, Y Ito, Y Sugure, S Oho, H Kawaguchi, M Yoshimoto 1st RIIF DATE Workshop, 2013 | 3 | 2013 |
| Low-power block-level instantaneous comparison 7T SRAM for dual modular redundancy S Okumura, Y Nakata, K Yanagida, Y Kagiyama, S Yoshimoto, ... 2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2011 | 3 | 2011 |
