| EDLAB: A benchmark for edge deep learning accelerators H Kong, S Huai, D Liu, L Zhang, H Chen, S Zhu, S Li, W Liu, M Rastogi, ... IEEE Design and Test, 2021 | 17 | 2021 |
| NVM-based FPGA block RAM with adaptive SLC-MLC conversion L Ju, X Sui, S Li, M Zhao, CJ Xue, J Hu, Z Jia IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 16 | 2018 |
| Reduced worst-case communication latency using single-cycle multihop traversal network-on-chip P Chen, W Liu, H Chen, S Li, M Li, L Yang, N Guan IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 14 | 2020 |
| Optimized Data Reuse via Reordering for Sparse Matrix-Vector Multiplication on FPGAs S Li, D Liu, W Liu 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), 1-9, 2021 | 11 | 2021 |
| An efficient gustavson-based sparse matrix–matrix multiplication accelerator on embedded FPGAs S Li, S Huai, W Liu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 8 | 2023 |
| A comprehensive memory management framework for CPU-FPGA heterogenous SoCs Z Du, Q Zhang, M Lin, S Li, X Li, L Ju IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 7 | 2022 |
| Accelerating Gustavson-based SpMM on Embedded FPGAs with Element-wise Parallelism and Access Pattern-aware Caches S Li, W Liu 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2023 | 5 | 2023 |
| iMAD: An In-Memory Accelerator for AdderNet with Efficient 8-bit Addition and Subtraction Operations S Zhu, S Li, W Liu Proceedings of the Great Lakes Symposium on VLSI 2022, 65-70, 2022 | 5 | 2022 |
| Partial order based non-preemptive communication scheduling towards real-time networks-on-chip P Chen, H Chen, J Zhou, D Liu, S Li, W Liu, W Chang, N Guan Proceedings of the 36th Annual ACM Symposium on Applied Computing, 145-154, 2021 | 4 | 2021 |
| Automatic data placement for CPU-FPGA heterogeneous multiprocessor System-on-Chips S Li, Y Wei, L Ju 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2019 | 4 | 2019 |
| Efficient FPGA-Based Sparse Matrix–Vector Multiplication With Data Reuse-Aware Compression S Li, D Liu, WLD Liu IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2023 | 3 | 2023 |
| MARCO: A High-performance Task Mapping and Routing Co-optimization Framework for Point-to-Point NoC-based Heterogeneous Computing Systems H Chen, Z Zhang, P Chen, X Luo, S Li, W Liu ACM Transactions on Embedded Computing Systems (TECS) 20 (5s), 1-21, 2021 | 3 | 2021 |
| MUGNoC: A Software-configured Multicast-Unicast-Gather NoC for Accelerating CNN Dataflows H Chen, D Liu, S Li, S Huai, X Luo, W Liu Proceedings of the 28th Asia and South Pacific Design Automation Conference …, 2023 | 2 | 2023 |
| An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning S Li, S Zhu, X Luo, T Luo, W Liu 2023 33rd International Conference on Field-Programmable Logic and …, 2023 | | 2023 |
| Accelerating sparse matrix operations on FPGAs with on/off-chip memories S Li Nanyang Technological University, 2023 | | 2023 |
Weichen LiuCollege of Computing and Data Science, Nanyang Technological UniversityVerified email at ntu.edu.sg
