| FPGA/DNN co-design: An efficient design methodology for IoT intelligence on the edge C Hao, X Zhang, Y Li, S Huang, J Xiong, K Rupnow, W Hwu, D Chen Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 228 | 2019 |
| Mind mappings: enabling efficient algorithm-accelerator mapping space search K Hegde, PA Tsai, S Huang, V Chandra, A Parashar, CW Fletcher Proceedings of the 26th ACM International Conference on Architectural …, 2021 | 114 | 2021 |
| Towards Neural Phrase-based Machine Translation PS Huang, C Wang, S Huang, D Zhou, L Deng Sixth International Conference on Learning Representations (ICLR), 2018 | 107 | 2018 |
| Large graph convolutional network training with GPU-oriented data communication architecture SW Min, K Wu, S Huang, M Hidayetoğlu, J Xiong, E Ebrahimi, D Chen, ... arXiv preprint arXiv:2103.03330, 2021 | 80 | 2021 |
| Hardware acceleration of the pair-HMM algorithm for DNA variant calling S Huang, GJ Manikandan, A Ramachandran, K Rupnow, WW Hwu, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 80 | 2017 |
| Pylog: An algorithm-centric python-based FPGA programming and synthesis flow S Huang, K Wu, H Jeong, C Wang, D Chen, WM Hwu IEEE Transactions on Computers 70 (12), 2015-2028, 2021 | 64 | 2021 |
| Accelerating subsequence similarity search based on dynamic time warping distance with FPGA Z Wang, S Huang, L Wang, H Li, Y Wang, H Yang Proceedings of the ACM/SIGDA international symposium on Field programmable …, 2013 | 51 | 2013 |
| Mixed precision quantization for ReRAM-based DNN inference accelerators S Huang, A Ankit, P Silveira, R Antunes, SR Chalamalasetti, I El Hajj, ... Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021 | 49 | 2021 |
| Analysis and modeling of collaborative execution strategies for heterogeneous CPU-FPGA architectures S Huang, LW Chang, I El Hajj, S Garcia de Gonzalo, J Gómez-Luna, ... Proceedings of the 2019 ACM/SPEC International Conference on Performance …, 2019 | 47 | 2019 |
| Hardware-software co-design for an analog-digital accelerator for machine learning J Ambrosi, A Ankit, R Antunes, SR Chalamalasetti, S Chatterjee, I El Hajj, ... 2018 IEEE International Conference on Rebooting Computing (ICRC), 1-13, 2018 | 43 | 2018 |
| Automatic generation of warp-level primitives and atomic instructions for fast and portable parallel reduction on GPUs SG De Gonzalo, S Huang, J Gómez-Luna, S Hammond, O Mutlu, W Hwu 2019 IEEE/ACM International Symposium on Code Generation and Optimization …, 2019 | 41 | 2019 |
| Accelerating sparse deep neural networks on FPGAs S Huang, C Pearson, R Nagi, J Xiong, D Chen, W Hwu 2019 IEEE High Performance Extreme Computing Conference (HPEC), 1-7, 2019 | 34 | 2019 |
| Pytorch-direct: Enabling gpu centric data access for very large graph neural network training with irregular accesses SW Min, K Wu, S Huang, M Hidayetoğlu, J Xiong, E Ebrahimi, D Chen, ... arXiv preprint arXiv:2101.07956, 2021 | 27 | 2021 |
| Triangle counting and truss decomposition using FPGA S Huang, M El-Hadedy, C Hao, Q Li, VS Mailthody, K Date, J Xiong, ... 2018 IEEE high performance extreme computing conference (HPEC), 1-7, 2018 | 27 | 2018 |
| Collaborative computing for heterogeneous integrated systems LW Chang, J Gómez-Luna, I El Hajj, S Huang, D Chen, W Hwu Proceedings of the 8th ACM/SPEC on International Conference on Performance …, 2017 | 27 | 2017 |
| Accelerating frequent item counting with FPGA Y Sun, Z Wang, S Huang, L Wang, Y Wang, R Luo, H Yang Proceedings of the 2014 ACM/SIGDA international symposium on Field …, 2014 | 22 | 2014 |
| Analysis and optimization of I/O cache coherency strategies for SoC-FPGA device SW Min, S Huang, M El-Hadedy, J Xiong, D Chen, W Hwu 2019 29th International Conference on Field Programmable Logic and …, 2019 | 16 | 2019 |
| Fpga/dnn co-design: An efficient design methodology for 1ot intelligence on the edge. In 2019 56th ACM/IEEE Design Automation Conference (DAC) C Hao, X Zhang, Y Li, S Huang, J Xiong, K Rupnow, W Hwu, D Chen IEEE, 1ś6, 2019 | 16 | 2019 |
| Chimera: A hybrid machine learning-driven multi-objective design space exploration tool for fpga high-level synthesis M Yu, S Huang, D Chen Intelligent Data Engineering and Automated Learning–IDEAL 2021: 22nd …, 2021 | 13 | 2021 |
| Near-memory and in-storage fpga acceleration for emerging cognitive computing workloads A Dhar, S Huang, J Xiong, D Jamsek, B Mesnet, J Huang, NS Kim, W Hwu, ... 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 68-75, 2019 | 13 | 2019 |
Wen-mei W. HwuSenior Distinguished Research Scientist, NVIDIA; Professor and Sanders-AMD Chair of Electrical andVerified email at illinois.edu
