| OpenCL-based FPGA-platform for stencil computation and its optimization methodology HM Waidyasooriya, Y Takei, S Tatsumi, M Hariyama IEEE Transactions on Parallel and Distributed Systems 28 (5), 1390-1402, 2016 | 56 | 2016 |
| Design of FPGA-based computing systems with OpenCL HM Waidyasooriya, M Hariyama, K Uchiyama Springer International Publishing, 2018 | 29 | 2018 |
| Hardware-acceleration of short-read alignment based on the burrows-wheeler transform HM Waidyasooriya, M Hariyama IEEE Transactions on Parallel and Distributed Systems 27 (5), 1358-1372, 2015 | 25 | 2015 |
| FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators HM Waidyasooriya, Y Takei, M Hariyama, M Kameyama 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1339-1342, 2012 | 16 | 2012 |
| FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL HM Waidyasooriya, M Hariyama 2016 IEEE/ACIS 15th International Conference on Computer and Information …, 2016 | 15 | 2016 |
| Implementation of a custom hardware-accelerator for short-read mapping using Burrows-Wheeler alignment HM Waidyasooriya, M Hariyama, M Kameyama 2013 35th Annual International Conference of the IEEE Engineering in …, 2013 | 14 | 2013 |
| OpenCL-based design of an FPGA accelerator for quantum annealing simulation HM Waidyasooriya, M Hariyama, MJ Miyama, M Ohzeki The Journal of Supercomputing 75 (8), 5019-5039, 2019 | 12 | 2019 |
| FPGA-accelerator for DNA sequence alignment based on an efficient data-dependent memory access scheme HM Waidyasooriya, M Hariyama, M Kameyama Highly-Efficient Accelerators and Reconfigurable Technologies, 127-30, 2014 | 12 | 2014 |
| Multi-FPGA accelerator architecture for stencil computation exploiting spacial and temporal scalability HM Waidyasooriya, M Hariyama IEEE Access 7, 53188-53201, 2019 | 11 | 2019 |
| Architecture of an FPGA accelerator for molecular dynamics simulation using OpenCL HM Waidyasooriya, M Hariyama, K Kasahara 2016 IEEE/ACIS 15th International Conference on Computer and Information …, 2016 | 11 | 2016 |
| Memory allocation exploiting temporal locality for reducing data-transfer bottlenecks in heterogeneous multicore processors HM Waidyasooriya, Y Ohbayashi, M Hariyama, M Kameyama IEEE transactions on Circuits and Systems for Video Technology 21 (10), 1453 …, 2011 | 11 | 2011 |
| FPGA-oriented design of an FDTD accelerator based on overlapped tiling Y Takei, HM Waidyasooriya, M Hariyama, M Kameyama Proceedings of the International Conference on Parallel and Distributed …, 2015 | 7 | 2015 |
| Implementation of a partially reconfigurable multi-context FPGA based on asynchronous architecture HM Waidyasooriya, M Hariyama, M Kameyama IEICE transactions on electronics 92 (4), 539-549, 2009 | 7 | 2009 |
| An FPGA accelerator for molecular dynamics simulation using OpenCL HM Waidyasooriya, M Hariyama, K Kasahara International Journal of Networked and Distributed Computing 5 (1), 52-61, 2017 | 6 | 2017 |
| Architecture of an FPGA-oriented heterogeneous multi-core processor with SIMD-accelerator cores HM Waidyasooriya, M Hariyama, M Kameyama ERSA 2010: proceedings of the 2010 international conference on engineering …, 2010 | 6 | 2010 |
| Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays. HM Waidyasooriya, M Hariyama, M Kameyama ERSA, 291-294, 2009 | 6 | 2009 |
| Multi-context FPGA using fine-grained interconnection blocks and its CAD environment HM Waidyasooriya, W Chong, M Hariyama, M Kameyama IEICE transactions on electronics 91 (4), 517-525, 2008 | 6 | 2008 |
| FPGA architecture for 3-D FDTD acceleration using open CL HM Waidyasooriya, M Hariyama, Y Ohtera 2016 Progress in Electromagnetic Research Symposium (PIERS), 4719-4719, 2016 | 5 | 2016 |
| Design of an FPGA-based FDTD accelerator using OpenCL Y Takei, HM Waidyasooriya, M Hariyama, M Kameyama International Conference on Parallel and Distributed Processing Techniques …, 2014 | 5 | 2014 |
| Memory allocation for window-based image processing on multiple memory modules with simple addressing functions HM Waidyasooriya, M Hariyama, M Kameyama IEICE transactions on fundamentals of electronics, communications and …, 2011 | 5 | 2011 |
