OpenCL-based FPGA-platform for stencil computation and its optimization methodology HM Waidyasooriya, Y Takei, S Tatsumi, M Hariyama IEEE Transactions on Parallel and Distributed Systems 28 (5), 1390-1402, 2016 | 97 | 2016 |
Design of FPGA-based computing systems with OpenCL HM Waidyasooriya, M Hariyama, K Uchiyama Springer, 2018 | 65 | 2018 |
Hardware-acceleration of short-read alignment based on the burrows-wheeler transform HM Waidyasooriya, M Hariyama IEEE Transactions on Parallel and Distributed Systems 27 (5), 1358-1372, 2015 | 48 | 2015 |
Multi-FPGA accelerator architecture for stencil computation exploiting spacial and temporal scalability HM Waidyasooriya, M Hariyama IEEE Access 7, 53188-53201, 2019 | 41 | 2019 |
Highly-parallel FPGA accelerator for simulated quantum annealing HM Waidyasooriya, M Hariyama IEEE Transactions on Emerging Topics in Computing 9 (4), 2019 | 31 | 2019 |
A GPU-based quantum annealing simulator for fully-connected Ising models utilizing spatial and temporal parallelism HM Waidyasooriya, M Hariyama IEEE Access 8, 67929-67939, 2020 | 22 | 2020 |
OpenCL-based design of an FPGA accelerator for quantum annealing simulation HM Waidyasooriya, M Hariyama, MJ Miyama, M Ohzeki The Journal of Supercomputing 75, 5019-5039, 2019 | 21 | 2019 |
FPGA-based deep-pipelined architecture for FDTD acceleration using OpenCL HM Waidyasooriya, M Hariyama 2016 IEEE/ACIS 15th International Conference on Computer and Information …, 2016 | 20 | 2016 |
FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators HM Waidyasooriya, Y Takei, M Hariyama, M Kameyama 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1339-1342, 2012 | 16 | 2012 |
An FPGA accelerator for molecular dynamics simulation using OpenCL HM Waidyasooriya, M Hariyama, K Kasahara International Journal of Networked and Distributed Computing 5 (1), 52-61, 2017 | 15 | 2017 |
Architecture of an FPGA accelerator for molecular dynamics simulation using OpenCL HM Waidyasooriya, M Hariyama, K Kasahara 2016 IEEE/ACIS 15th International Conference on Computer and Information …, 2016 | 15 | 2016 |
FPGA-accelerator for DNA sequence alignment based on an efficient data-dependent memory access scheme HM Waidyasooriya, M Hariyama, M Kameyama Highly-Efficient Accelerators and Reconfigurable Technologies, 127-30, 2014 | 15 | 2014 |
FPGA-accelerated searchable encrypted database management systems for cloud services M Okada, T Suzuki, N Nishio, HM Waidyasooriya, M Hariyama IEEE Transactions on Cloud Computing 10 (2), 1373-1385, 2020 | 13 | 2020 |
FPGA-oriented design of an FDTD accelerator based on overlapped tiling Y Takei, HM Waidyasooriya, M Hariyama, M Kameyama Proceedings of the International Conference on Parallel and Distributed …, 2015 | 13 | 2015 |
Implementation of a custom hardware-accelerator for short-read mapping using Burrows-Wheeler alignment HM Waidyasooriya, M Hariyama, M Kameyama 2013 35th Annual International Conference of the IEEE Engineering in …, 2013 | 13 | 2013 |
Accelerator architecture for simulated quantum annealing based on resource-utilization-aware scheduling and its implementation using OpenCL HM Waidyasooriya, Y Araki, M Hariyama 2018 International Symposium on Intelligent Signal Processing and …, 2018 | 12 | 2018 |
OpenCL‐Based FPGA Accelerator for 3D FDTD with Periodic and Absorbing Boundary Conditions HM Waidyasooriya, T Endo, M Hariyama, Y Ohtera International Journal of Reconfigurable Computing 2017 (1), 6817674, 2017 | 11 | 2017 |
Memory allocation exploiting temporal locality for reducing data-transfer bottlenecks in heterogeneous multicore processors HM Waidyasooriya, Y Ohbayashi, M Hariyama, M Kameyama IEEE transactions on Circuits and Systems for Video Technology 21 (10), 1453 …, 2011 | 11 | 2011 |
A scalable emulator for quantum fourier transform using multiple-fpgas with high-bandwidth-memory HM Waidyasooriya, H Oshiyama, Y Kurebayashi, M Hariyama, M Ohzeki IEEE Access 10, 65103-65117, 2022 | 10 | 2022 |
Temporal and spatial parallel processing of simulated quantum annealing on a multicore CPU HM Waidyasooriya, M Hariyama The Journal of Supercomputing 78 (6), 8733-8750, 2022 | 9 | 2022 |