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Javier Ardila
Javier Ardila
PhD in Electronic Engineering
Verified email at correo.uis.edu.co
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Cited by
Year
A 32-bit RISC-V AXI4-lite bus-based microcontroller with 10-bit SAR ADC
C Duran, DL Rueda, G Castillo, A Agudelo, C Rojas, L Chaparro, ...
2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 315-318, 2016
222016
A family of compact trim-free CMOS nano-ampere current references
J Santamaria, N Cuevas, GLE Rueda, J Ardila, E Roa
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2019
132019
A system-on-chip platform for the internet of things featuring a 32-bit RISC-V based microcontroller
C Duran, A Amaya, R Torres, J Ardila, L Rueda, G Castillo, A Agudelo, ...
2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2017
132017
An energy-efficient RISC-V RV32IMAC microcontroller for periodical-driven sensing applications
C Duran, M Wachs, A Huntington, J Ardila, J Kang, A Amaya, H Gomez, ...
2020 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2020
92020
A stable physically unclonable function based on a standard CMOS NVR
J Ardila, J Santamaria, K Florez, E Roa
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2020
32020
A novel loop gain adaptation method for digital CDRs based on the cross-correlation function
J Ardila, E Roa
2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2019
32019
An All-Thin-Devices Level Shifter in Standard-Cell Format for Auto Place-and-Route Flow
N Cuevas, J Ardila, E Roa
2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 45-48, 2019
32019
A digital offset reduction method for dynamic comparators based on phase measurement
A Amaya, J Ardila, E Roa
2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 661-664, 2017
32017
On the impact of channel loss on CDR locking
J Ardila, E Roa
2016 IEEE 59th International Midwest Symposium on Circuits and Systems …, 2016
32016
On the Cross-Correlation Based Loop Gain Adaptation for Bang-Bang CDRs
J Ardila, H Morales, E Roa
IEEE Transactions on Circuits and Systems I: Regular Papers 67 (4), 1169-1180, 2019
22019
A digital phase‐based on‐fly offset compensation method for decision feedback equalisers
A Amaya, J Ardila, E Roa
IET Circuits, Devices & Systems 15 (4), 297-309, 2021
12021
Stochastic resonance in bang-bang phase detector gain and the impact on CDR locking
J Ardila, E Roa
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
12018
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