| High-performance CMOS variability in the 65-nm regime and beyond K Bernstein, DJ Frank, AE Gattiker, W Haensch, BL Ji, SR Nassif, ... IBM journal of research and development 50 (4.5), 433-449, 2006 | 704 | 2006 |
| Content addressable memory array programmed to perform logic operations L Chang, GS Ditlow, BL Ji, RK Montoye US Patent 8,059,438, 2011 | 384 | 2011 |
| Critical-state model for harmonic generation in high-temperature superconductors L Ji, RH Sohn, GC Spalding, CJ Lobb, M Tinkham Physical Review B 40 (16), 10936, 1989 | 323 | 1989 |
| Practical strategies for power-efficient computing technologies L Chang, DJ Frank, RK Montoye, SJ Koester, BL Ji, PW Coteus, ... Proceedings of the IEEE 98 (2), 215-236, 2010 | 239 | 2010 |
| A 6.4-Gb/s CMOS SerDes core with feed-forward and decision-feedback equalization T Beukema, M Sorna, K Selander, S Zier, BL Ji, P Murfet, J Mason, ... IEEE Journal of Solid-State Circuits 40 (12), 2633-2645, 2005 | 232 | 2005 |
| A fully-integrated switched-capacitor 2∶1 voltage converter with regulation capability and 90% efficiency at 2.3A/mm2 L Chang, RK Montoye, BL Ji, AJ Weger, KG Stawiasz, RH Dennard VLSI Circuits (VLSIC), 2010 IEEE Symposium on, 55-56, 2010 | 215 | 2010 |
| Magnetic-field-dependent surface resistance and two-level critical-state model for granular superconductors L Ji, MS Rzchowski, N Anand, M Tinkham Physical Review B 47 (1), 470, 1993 | 195 | 1993 |
| Measurement of single electron lifetimes in a multijunction trap PD Dresselhaus, L Ji, S Han, JE Lukens, KK Likharev Physical review letters 72 (20), 3226, 1994 | 191 | 1994 |
| Voltage conversion and integrated circuits with stacked voltage domains RH Dennard, BL Ji US Patent 8,754,672, 2014 | 149 | 2014 |
| High performance CMOS variability in the 65nm regime and beyond S Nassif, K Bernstein, DJ Frank, A Gattiker, W Haensch, BL Ji, E Nowak, ... Electron Devices Meeting, 2007. IEDM 2007. IEEE International, 569-571, 2007 | 145 | 2007 |
| Novel Superconductivity DK Finnemore, MM Fang, JR Clem, RW McCallum, JE Ostenson, L Ji, ... Plenum, New York, 1987 | 122* | 1987 |
| Back-gated fully depleted SOI transistor L Chang, BL Ji, A Kumar, A Majumdar, K Saenger, L Shi, JB Yau US Patent 8,030,145, 2011 | 100 | 2011 |
| Embedded DRAM integrated circuits with extremely thin silicon-on-insulator pass transistors J Cai, J Chang, L Chang, BL Ji, SJ Koester, A Majumdar US Patent 7,985,633, 2011 | 87 | 2011 |
| Microwave surface resistance and vortices in high-T c superconductors: Observation of flux pinning and flux creep L Ji, MS Rzchowski, M Tinkham Physical Review B 42 (7), 4838, 1990 | 82 | 1990 |
| Hierarchical power supply noise monitoring device and system for very large scale integrated circuits HH Chen, LLC Hsu, BL Ji, LK Wang US Patent 6,823,293, 2004 | 81* | 2004 |
| Air channel interconnects for 3-D integration LL Hsu, BL Ji, F Liu, CE Murray US Patent 8,198,174, 2012 | 59 | 2012 |
| Fabrication and characterization of single‐electron transistors and traps L Ji, PD Dresselhaus, S Han, K Lin, W Zheng, JE Lukens Journal of Vacuum Science & Technology B: Microelectronics and Nanometer …, 1994 | 55 | 1994 |
| Method and system for optimizing transmission and reception power levels in a communication system LL Hsu, BL Ji, KD Selander, MA Sorna US Patent 6,980,824, 2005 | 50 | 2005 |
| A 6.4 Gb/s CMOS SerDes core with feedforward and decision-feedback equalization M Sorna, T Beukerna, K Selander, S Zier, B Ji, P Murfet, J Mason, W Rhee, ... Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC …, 2005 | 50 | 2005 |
| A 390-mm/sup 2/, 16-bank, 1-Gb DDR SDRAM with hybrid bitline architecture T Kirihata, G Mueller, B Ji, G Frankowsky, JM Ross, H Terletzki, DG Netis, ... IEEE Journal of Solid-State Circuits 34 (11), 1580-1588, 1999 | 48 | 1999 |
Leland ChangIBM確認したメール アドレス: us.ibm.com
