フォロー
Wangyang (Lucas) Zhang
Wangyang (Lucas) Zhang
Cadence Design Systems, Pittsburgh, PA
確認したメール アドレス: cadence.com - ホームページ
タイトル
引用先
引用先
Bayesian model fusion: large-scale performance modeling of analog and mixed-signal circuits by reusing early-stage data
F Wang, W Zhang, S Sun, X Li, C Gu
Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013
1152013
Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits
W Zhang, X Li, F Liu, E Acar, RA Rutenbar, RD Blanton
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2011
722011
Test cost reduction through performance prediction using virtual probe
HM Chang, KT Cheng, W Zhang, X Li, KM Butler
International Test Conference (ITC), 2011 IEEE, 1-9, 2011
472011
Test Data Analytics—Exploring Spatial and Test-Item Correlations in Production Test Data
CK Hsu, F Lin, KT Cheng, W Zhang, X Li, JM Carulli Jr, KM Butler
International Test Conference (ITC), 2013 IEEE, 2013
442013
Automatic clustering of wafer spatial signatures
W Zhang, X Li, S Saxena, A Strojwas, R Rutenbar
Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013
422013
Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion
X Li, W Zhang, F Wang, S Sun, C Gu
Proceedings of the International Conference on Computer-Aided Design, 627-634, 2012
422012
Bayesian virtual probe: minimizing variation characterization cost for nanoscale IC technologies via Bayesian inference
W Zhang, X Li, RA Rutenbar
Proceedings of the 47th Design Automation Conference, 262-267, 2010
422010
Multi-wafer virtual probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation
W Zhang, X Li, E Acar, F Liu, R Rutenbar
2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 47-54, 2010
362010
An efficient method for chip-level statistical capacitance extraction considering process variations with spatial correlation
W Zhang, W Yu, Z Wang, Z Yu, R Jiang, J Xiong
Proceedings of the conference on Design, automation and test in Europe, 580-585, 2008
342008
Attention routing: track-assignment detailed routing using attention-based reinforcement learning
H Liao, Q Dong, X Dong, W Zhang, W Zhang, W Qi, E Fallon, LB Kara
International Design Engineering Technical Conferences and Computers and …, 2020
312020
Variational capacitance extraction of on-chip interconnects based on continuous surface model
W Yu, C Hu, W Zhang
Proceedings of the 46th Annual Design Automation Conference, 758-763, 2009
302009
Efficient spatial pattern analysis for variation decomposition via robust sparse regression
W Zhang, K Balakrishnan, X Li, DS Boning, S Saxena, A Strojwas, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
252013
Large-scale statistical performance modeling of analog and mixed-signal circuits
X Li, W Zhang, F Wang
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-8, 2012
242012
Toward efficient large-scale performance modeling of integrated circuits via multi-mode/multi-corner sparse regression
W Zhang, TH Chen, MY Ting, X Li
Proceedings of the 47th Design Automation Conference, 897-902, 2010
192010
Toward efficient spatial variation decomposition via sparse regression
W Zhang, K Balakrishnan, X Li, D Boning, R Rutenbar
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 162-169, 2011
152011
Method and system for performing cross-validation for model-based layout recommendations
W Zhang, R Colwell, H Luo, N Rane, EL Fallon
US Patent 10,699,051, 2020
142020
Parallel statistical capacitance extraction of on-chip interconnects with an improved geometric variation model
W Yu, C Hu, W Zhang
16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011), 67-72, 2011
132011
Method and system for automatically extracting layout design patterns for custom layout design reuse through interactive recommendations
R Colwell, W Zhang, EL Fallon, D White, JA Martinez, RC Yan
US Patent 10,628,546, 2020
122020
Parallel extraction of worst case corners
H Liu, W Zhang
US Patent App. 10/289,764, 2019
10*2019
Failure boundary classification and corner creation for scaled-sigma sampling
W Zhang, H Liu
US Patent App. 10/325,056, 2019
9*2019
現在システムで処理を実行できません。しばらくしてからもう一度お試しください。
論文 1–20