Dave Lester
Dave Lester
Lecturer, School of Computer Science, University of Manchester, UK
Verified email at cs.man.ac.uk
Cited by
Cited by
Overview of the spinnaker system architecture
SB Furber, DR Lester, LA Plana, JD Garside, E Painkras, S Temple, ...
IEEE Transactions on Computers 62 (12), 2454-2467, 2012
SpiNNaker: mapping neural networks onto a massively-parallel chip multiprocessor
MM Khan, DR Lester, LA Plana, A Rast, X Jin, E Painkras, SB Furber
2008 IEEE International Joint Conference on Neural Networks (IEEE World …, 2008
Implementing Functional Languages
Simon L.. Peyton Jones, David R.. Lester
Prentice Hall, 1992
SpiNNaker: A 1-W 18-core system-on-chip for massively-parallel neural network simulation
E Painkras, LA Plana, J Garside, S Temple, F Galluppi, C Patterson, ...
IEEE Journal of Solid-State Circuits 48 (8), 1943-1953, 2013
Performance comparison of the digital neuromorphic hardware SpiNNaker and the neural network simulation software NEST for a full-scale cortical microcircuit model
SJ van Albada, AG Rowley, J Senk, M Hopkins, M Schmidt, AB Stokes, ...
Frontiers in neuroscience 12, 291, 2018
A modular fully‐lazy lambda lifter in Haskell
SLP Jones, D Lester
Software: Practice and Experience 21 (5), 479-506, 1991
Verified real number calculations: A library for interval arithmetic
M Daumas, D Lester, C Munoz
IEEE Transactions on Computers 58 (2), 226-237, 2008
The HDG-machine: a highly distributed graph-reducer for a transputer network
H Kingdon, DR Lester, GL Burn
The computer journal 34 (4), 290-300, 1991
A survey of exact arithmetic implementations
P Gowland, D Lester
Computability and Complexity in Analysis, 30-47, 2001
Enumerating the rationals
J Gibbons, D Lester, R Bird
Journal of Functional Programming 16 (3), 2006
Concurrent heterogeneous neural model simulation on real-time neuromimetic hardware
A Rast, F Galluppi, S Davies, L Plana, C Patterson, T Sharp, D Lester, ...
Neural Networks 24 (9), 961-978, 2011
Real number calculations and theorem proving
C Munoz, D Lester
Theorem Proving in Higher Order Logics, 195-210, 2005
Combinator Graph Reduction: A Congruence and its Applications (PRG-73)
D Lester
PRG, Oxford University Computing Laboratory, 1989
Topology in PVS: continuous mathematics with applications
DR Lester
Proceedings of the second workshop on Automated formal methods, 11-20, 2007
sPyNNaker: a software package for running PyNN simulations on SpiNNaker
O Rhodes, PA Bogdan, C Brenninkmeijer, S Davidson, D Fellows, A Gait, ...
Frontiers in neuroscience 12, 816, 2018
An efficient distributed garbage collection algorithm
DR Lester
International Conference on Parallel Architectures and Languages Europe, 207-223, 1989
A fixed point exponential function accelerator for a neuromorphic many-core system
J Partzsch, S Höppner, M Eberlein, R Schüffny, C Mayr, DR Lester, ...
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
A location-independent direct link neuromorphic interface
AD Rast, J Partzsch, C Mayr, J Schemmel, S Hartmann, LA Plana, ...
The 2013 International Joint Conference on Neural Networks (IJCNN), 1-8, 2013
Interfacing real-time spiking I/O with the SpiNNaker neuromimetic architecture
S Davies, C Patterson, F Galluppi, A Rast, D Lester, SB Furber
Proceedings of the 17th International Conference on Neural Information …, 2010
Using PVS to validate the algorithms of an exact arithmetic
D Lester, P Gowland
Theoretical Computer Science 291 (2), 203-218, 2003
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