フォロー
Yuko Hara-Azumi
タイトル
引用先
引用先
Proposal and quantitative analysis of the CHStone benchmark program suite for practical C-based high-level synthesis
Y Hara, H Tomiyama, S Honda, H Takada
journal of information processing 17, 242-254, 2009
3452009
CHStone: A benchmark program suite for practical c-based high-level synthesis
Y Hara, H Tomiyama, S Honda, H Takada, K Ishii
Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on …, 2008
2782008
CGRA-ME: A unified framework for CGRA modelling and exploration
SA Chin, N Sakamoto, A Rui, J Zhao, JH Kim, Y Hara-Azumi, J Anderson
2017 IEEE 28th international conference on application-specific systems …, 2017
1402017
Effect of LFSR seeding, scrambling and feedback polynomial on stochastic computing accuracy
JH Anderson, Y Hara-Azumi, S Yamashita
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
382016
APNAS: Accuracy-and-performance-aware neural architecture search for neural hardware accelerators
P Achararit, MA Hanif, RVW Putra, M Shafique, Y Hara-Azumi
IEEE Access 8, 165319-165334, 2020
302020
Profiling-driven multi-cycling in FPGA high-level synthesis
S Hadjis, A Canis, R Sobue, Y Hara-Azumi, H Tomiyama, J Anderson
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 31-36, 2015
232015
A clique-based approach to find binding and scheduling result in flow-based microfluidic biochips
TA Dinh, S Yamashita, TY Ho, Y Hara-Azumi
2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC), 199-204, 2013
192013
Synthesizable-from-C embedded processor based on MIPS-ISA and OISC
T Ahmed, N Sakamoto, J Anderson, Y Hara-Azumi
2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing …, 2015
162015
FPGA-based hardware/software co-design of a bio-inspired SAT solver
AHN Nguyen, M Aono, Y Hara-Azumi
IEEE Access 8, 49053-49065, 2020
152020
Amoeba-inspired stochastic hardware SAT solver
K Hara, N Takeuchi, M Aono, Y Hara-Azumi
20th International Symposium on Quality Electronic Design (ISQED), 151-156, 2019
132019
A systematic methodology for design and analysis of approximate array multipliers
T Yamamoto, I Taniguchi, H Tomiyama, S Yamashita, Y Hara-Azumi
2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 352-354, 2016
132016
Cost-Efficient Scheduling in High-Level Synthesis for Soft-Error Vulnerability Mitigation
Y Hara, H Tomiyama
International Symposium on Quality Electronic Design, 2013
11*2013
Amoeba-inspired hardware SAT solver with effective feedback control
AHN Nguyen, M Aono, Y Hara-Azumi
2019 International Conference on Field-Programmable Technology (ICFPT), 243-246, 2019
92019
Task mapping techniques for embedded many-core socs
J Kaida, T Hieda, I Taniguchi, H Tomiyama, Y Hara-Azumi, K Inoue
2012 International SoC Design Conference (ISOCC), 204-207, 2012
92012
Selective resource sharing with RT-level retiming for clock enhancement in high-level synthesis
Y Hara-Azumi, T Matsuba, H Tomiyama, S Honda, H Takada
2012 IEEE 14th International Conference on High Performance Computing and …, 2012
92012
Deep joint source-channel coding and modulation for underwater acoustic communication
Y Inoue, D Hisano, K Maruta, Y Hara-Azumi, Y Nakayama
2021 IEEE Global Communications Conference (GLOBECOM), 1-7, 2021
82021
Implementation of lightweight eHealth applications on a low-power embedded processor
M Yang, Y Hara-Azumi
IEEE Access 8, 121724-121732, 2020
82020
Instruction-set extension under process variation and aging effects
Y Hara-Azumi, F Firouzi, S Kiamehr, M Tahoori
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 182-187, 2013
82013
Function call optimization in behavioral synthesis
Y Hara, H Tomiyama, S Honda, H Takada
9th EUROMICRO Conference on Digital System Design (DSD'06), 522-529, 2006
82006
Zero correlation error: A metric for finite-length bitstream independence in stochastic computing
H Hsiao, JS Miguel, Y Hara-Azumi, J Anderson
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
72021
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