| KPart: A hybrid cache partitioning-sharing technique for commodity multicores N El-Sayed, A Mukkara, PA Tsai, H Kasture, X Ma, D Sanchez 2018 IEEE International Symposium on High Performance Computer Architecture …, 2018 | 168 | 2018 |
| Mind mappings: enabling efficient algorithm-accelerator mapping space search K Hegde, PA Tsai, S Huang, V Chandra, A Parashar, CW Fletcher Proceedings of the 26th ACM International Conference on Architectural …, 2021 | 114 | 2021 |
| Jenga: Software-Defined Cache Hierarchies PA Tsai, N Beckmann, D Sanchez Proceedings of the 44th Annual International Symposium on Computer …, 2017 | 86 | 2017 |
| Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling YN Wu, PA Tsai, A Parashar, V Sze, JS Emer Proceedings of the 55th annual IEEE/ACM international symposium on …, 2022 | 65 | 2022 |
| Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies PA Tsai, C Chen, D Sanchez Proceedings of the 51st annual IEEE/ACM international symposium on …, 2018 | 55 | 2018 |
| Scaling distributed cache hierarchies through computation and data co-scheduling N Beckmann, PA Tsai, D Sanchez 2015 IEEE 21st International Symposium on High Performance Computer …, 2015 | 52 | 2015 |
| Sparseloop: An analytical, energy-focused design space exploration methodology for sparse tensor accelerators YN Wu, PA Tsai, A Parashar, V Sze, JS Emer 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021 | 40 | 2021 |
| Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy PA Tsai, D Sanchez Proceedings of 2019 Architectural Support for Programming Languages and …, 2019 | 33 | 2019 |
| Highlight: Efficient and flexible dnn acceleration with hierarchical structured sparsity YN Wu, PA Tsai, S Muralidharan, A Parashar, V Sze, J Emer Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 29 | 2023 |
| Safecracker: Leaking Secrets through Compressed Caches PA Tsai, A Sanchez, CW Fletcher, D Sanchez Proceedings of 2020 Architectural Support for Programming Languages and …, 2020 | 28 | 2020 |
| Rethinking the Memory Hierarchy for Modern Languages PA Tsai, YL Gan, D Sanchez Proceedings of the 51st annual IEEE/ACM international symposium on …, 2018 | 28 | 2018 |
| Union: A unified HW-SW co-design ecosystem in MLIR for evaluating tensor operations on spatial accelerators G Jeong, G Kestor, P Chatarasi, A Parashar, PA Tsai, S Rajamanickam, ... 2021 30th International Conference on Parallel Architectures and Compilation …, 2021 | 21 | 2021 |
| Accelerating sparse data orchestration via dynamic reflexive tiling TO Odemuyiwa, H Asghari-Moghaddam, M Pellauer, K Hegde, PA Tsai, ... Proceedings of the 28th ACM International Conference on Architectural …, 2023 | 20 | 2023 |
| Nexus: A New Approach to Replication in Distributed Shared Caches PA Tsai, N Beckmann, D Sanchez Proceedings of the 26th international conference on Parallel Architectures …, 2017 | 19 | 2017 |
| Path-diversity-aware adaptive routing in network-on-chip systems YH Kuo, PA Tsai, HP Ho, EJ Chang, HK Hsin, AY Wu 2012 IEEE 6th International Symposium on Embedded Multicore SoCs, 175-182, 2012 | 19 | 2012 |
| SIMD : A Generalized Matrix Instruction Set for Accelerating Tensor Computation beyond GEMM Y Zhang, PA Tsai, HW Tseng Proceedings of the 49th Annual International Symposium on Computer Architecture, 2022 | 16 | 2022 |
| Demystifying map space exploration for npus SC Kao, A Parashar, PA Tsai, T Krishna 2022 IEEE International Symposium on Workload Characterization (IISWC), 269-281, 2022 | 15 | 2022 |
| Ruby: Improving hardware efficiency for tensor algebra accelerators through imperfect factorization M Horeni, P Taheri, PA Tsai, A Parashar, J Emer, S Joshi 2022 IEEE International Symposium on Performance Analysis of Systems and …, 2022 | 15 | 2022 |
| Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems PA Tsai, YH Kuo, EJ Chang, HK Hsin, AY Wu 2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT), 1-4, 2013 | 13 | 2013 |
| RM-STC: Row-merge dataflow inspired GPU sparse tensor core for energy-efficient sparse acceleration G Huang, Z Wang, PA Tsai, C Zhang, Y Ding, Y Xie Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 11 | 2023 |
Angshuman ParasharSr. Research Scientist, NVIDIAVerified email at nvidia.com
