| Assessing accelerator-based HPC reverse time migration M Araya-Polo, J Cabezas, M Hanzich, M Pericas, F Rubio, I Gelado, ... IEEE Transactions on Parallel and Distributed Systems 22 (1), 147-162, 2010 | 88 | 2010 |
| Kilo-instruction processors: Overcoming the memory wall A Cristal, OJ Santana, F Cazorla, M Galluzzi, T Ramirez, M Pericas, ... IEEE micro 25 (3), 48-57, 2005 | 82 | 2005 |
| A flexible heterogeneous multi-core architecture M Pericas, A Cristal, FJ Cazorla, R Gonzalez, DA Jimenez, M Valero 16th International Conference on Parallel Architecture and Compilation …, 2007 | 70 | 2007 |
| Trends in data locality abstractions for HPC systems D Unat, A Dubey, T Hoefler, J Shalf, M Abraham, M Bianco, ... IEEE Transactions on Parallel and Distributed Systems 28 (10), 3007-3020, 2017 | 52 | 2017 |
| A decoupled kilo-instruction processor M Pericas, A Cristal, R González, DA Jiménez, M Valero The Twelfth International Symposium on High-Performance Computer …, 2006 | 44 | 2006 |
| Programming abstractions for data locality A Tate, A Kamil, A Dubey, A Größlinger, B Chamberlain, B Goglin, ... PADAL Workshop 2014, April 28--29, Swiss National Supercomputing Center …, 2014 | 43 | 2014 |
| PPMC: a programmable pattern based memory controller T Hussain, M Shafiq, M Pericas, N Navarro, E Ayguadé International Symposium on Applied Reconfigurable Computing, 89-101, 2012 | 39 | 2012 |
| Exploiting memory customization in FPGA for 3D stencil computations M Shafiq, M Pericas, R De la Cruz, M Araya-Polo, N Navarro, E Ayguadé 2009 International Conference on Field-Programmable Technology, 38-45, 2009 | 35 | 2009 |
| Fork-join and data-driven execution models on multi-core architectures: Case study of the FMM A Amer, N Maruyama, M Pericàs, K Taura, R Yokota, S Matsuoka International Supercomputing Conference, 255-266, 2013 | 27 | 2013 |
| DAGViz: A DAG visualization tool for analyzing task-parallel program traces A Huynh, D Thain, M Pericàs, K Taura Proceedings of the 2nd Workshop on Visual Performance Analysis, 1-8, 2015 | 26 | 2015 |
| Reconfigurable memory controller with programmable pattern support T Hussain, M Pericas, E Ayguadé HiPEAC Workshop on Reconfigurable Computing 25, 67, 2011 | 23 | 2011 |
| RADAR: Runtime-assisted dead region management for last-level caches M Manivannan, V Papaefstathiou, M Pericas, P Stenstrom 2016 IEEE International Symposium on High Performance Computer Architecture …, 2016 | 21 | 2016 |
| Implementation of a reverse time migration kernel using the hce high level synthesis tool T Hussain, M Pericas, N Navarro, E Ayguadé 2011 International Conference on Field-Programmable Technology, 1-8, 2011 | 18 | 2011 |
| Software-managed power reduction in infiniband links B Dickov, M Pericas, P Carpenter, N Navarro, E Ayguadé 2014 43rd International Conference on Parallel Processing, 311-320, 2014 | 16 | 2014 |
| A two-level load/store queue based on execution locality M Pericas, A Cristal, FJ Cazorla, R González, A Veidenbaum, DA Jiménez, ... 2008 International Symposium on Computer Architecture, 25-36, 2008 | 16 | 2008 |
| PPMC: Hardware scheduling and memory management support for multi accelerators T Hussain, M Pericas, N Navarro, E Ayguade 22nd International Conference on Field Programmable Logic and Applications …, 2012 | 15 | 2012 |
| Analysis of Data Reuse in Task-Parallel Runtimes M Pericas, A Amer, K Taura, S Matsuoka Lecture Notes on Computer Science 8551, 73-87, 2014 | 14 | 2014 |
| An asymmetric clustered processor based on value content R González, A Cristal, M Pericas, M Valero, A Veidenbaum Proceedings of the 19th annual international conference on Supercomputing, 61-70, 2005 | 14 | 2005 |
| LEGaTO: towards energy-efficient, secure, fault-tolerant toolset for heterogeneous computing A Cristal, OS Unsal, X Martorell, P Carpenter, R De La Cruz, L Bautista, ... Proceedings of the 15th ACM International Conference on Computing Frontiers …, 2018 | 11 | 2018 |
| Scalable analysis of multicore data reuse and sharing M Pericas, K Taura, S Matsuoka Proceedings of the 28th ACM international conference on Supercomputing, 353-362, 2014 | 9 | 2014 |
Mateo ValeroProfessor and director of the Barcelona Supercomputing Center確認したメール アドレス: bsc.es
