Marco Mastrapasqua
Marco Mastrapasqua
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Low field electron and hole mobility of SOI transistors fabricated on ultrathin silicon films for deep submicrometer technology application
D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi
IEEE Transactions on Electron Devices 48 (12), 2842-2850, 2001
An experimental study of mobility enhancement in ultrathin SOI transistors operated in double-gate mode
D Esseni, M Mastrapasqua, GK Celler, C Fiegna, L Selmi, E Sangiorgi
IEEE Transactions on Electron Devices 50 (3), 802-808, 2003
Secondary Electron flash-a high performance, low power flash technology for 0.35/spl mu/m and below
JD Bude, M Mastrapasqua, MR Pinto, RW Gregor, PJ Kelley, RA Kohler, ...
International Electron Devices Meeting. IEDM Technical Digest, 279-282, 1997
Low field mobility of ultra-thin SOI N-and P-MOSFETs: Measurements and implications on the performance of ultra-short MOSFETs
D Esseni, M Mastrapasqua, GK Celler, FH Baumann, C Fiegna, L Selmi, ...
International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No …, 2000
Observation of avalanche propagation by multiplication assisted diffusion in pn junctions
A Lacaita, M Mastrapasqua, M Ghioni, S Vanoli
Applied physics letters 57 (5), 489-491, 1990
Impact ionization and distribution functions in sub-micron nMOSFET technologies
JD Bude, M Mastrapasqua
IEEE Electron Device Letters 16 (10), 439-441, 1995
Characterization of tunneling current in ultra-thin gate oxide
A Ghetti, CT Liu, M Mastrapasqua, E Sangiorgi
Solid-State Electronics 44 (9), 1523-1531, 2000
Compact modeling of thermal resistance in bipolar transistors on bulk and SOI substrates
A Pacelli, P Palestri, M Mastrapasqua
IEEE Transactions on Electron Devices 49 (6), 1027-1033, 2002
Light emitting logic devices based on real space transfer in complementary InGaAs/InAlAs heterostructures
S Luryi, M Mastrapasqua
Negative Differential Resistance and Instabilities in 2-D Semiconductors, 53-82, 1993
Verification of electron distributions in silicon by means of hot carrier luminescence measurements
L Selmi, M Mastrapasqua, DM Boulin, JD Bude, M Pavesi, E Sangiorgi, ...
IEEE Transactions on Electron Devices 45 (4), 802-808, 1998
An experimental study of low field electron mobility in double-gate, ultra-thin SOI MOSFETs
D Esseni, M Mastrapasqua, C Fiegna, GK Celler, L Selmi, E Sangiorgi
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
Very low cost graded SiGe base bipolar transistors for a high performance modular BiCMOS process
CA King, MR Frei, M Mastrapasqua, KK Ng, YO Kim, RW Johnson, ...
International Electron Devices Meeting 1999. Technical Digest (Cat. No …, 1999
Non-volatile memory element for programmable logic applications and operational methods therefor
HIL Cong, JD Bude, M Mastrapasqua
US Patent 6,002,610, 1999
Heterojunction bipolar transistor
MR Frei, CA King, Y Ma, M Mastrapasqua, KK Ng
US Patent 6,509,242, 2003
Strong dependence of time resolution on detector diameter in single photon avalanche diodes
A Lacaita, M Mastrapasqua
Electronics Letters 26 (24), 2053-2054, 1990
Thermal resistance in Si/sub 1-x/Ge/sub x/HBTs on bulk-Si and SOI substrates
P Palestri, A Pacelli, M Mastrapasqua
Proceedings of the 2001 BIPOLAR/BiCMOS Circuits and Technology Meeting (Cat …, 2001
Light-emitting transistor based on real-space transfer: electrical and optical properties
M Mastrapasqua, S Luryi, F Capasso, AL Hutchinson, DL Sivco, AY Cho
IEEE transactions on electron devices 40 (2), 250-258, 1993
Method for erasing and programming memory devices
JD Bude, M Mastrapasqua
US Patent 6,011,722, 2000
Generation of equivalent circuits from physics-based device simulation
A Pacelli, M Mastrapasqua, S Luryi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
A non-local impact ionization/lattice temperature model for VLSI double-gate ultrathin SOI NMOS devices
KW Su, JB Kuo
IEEE Transactions on Electron Devices 44 (2), 324-330, 1997
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