Paolo Faraboschi
Paolo Faraboschi
Hewlett Packard Labs
確認したメール アドレス: faraboschi.com - ホームページ
タイトル
引用先
引用先
Embedded computing: a VLIW approach to architecture, compilers and tools
JA Fisher, P Faraboschi, C Young
Elsevier, 2005
4492005
Lx: a technology platform for customizable VLIW embedded processing
P Faraboschi, G Brown, JA Fisher, G Desoli, F Homewood
ISCA27 and ACM SIGARCH Computer Architecture News 28 (2), 203-213, 2000
4412000
COTSon: infrastructure for full system simulation
E Argollo, A Falcón, P Faraboschi, M Monchiero, D Ortega
ACM SIGOPS Operating Systems Review 43 (1), 52-61, 2009
2412009
Operating System Support for NVM+ DRAM Hybrid Main Memory.
JC Mogul, E Argollo, MA Shah, P Faraboschi
HotOS 9, 4-14, 2009
2202009
Hardware solutions for fuzzy control
A Costa, A De Gloria, P Faraboschi, A Pagni, G Rizzotto
Proceedings of the IEEE 83 (3), 422-434, 1995
1301995
Deli: A new run-time control point
G Desoli, N Mateev, E Duesterwald, P Faraboschi, JA Fisher
35th Annual IEEE/ACM International Symposium on Microarchitecture, 2002 …, 2002
1182002
Custom-fit processors: Letting applications define architectures
JA Fisher, P Faraboschi, G Desoli
Proceedings of the 29th Annual IEEE/ACM International Symposium on …, 1996
1131996
The latest word in digital and media processing
P Faraboschi, G Desoli, JA Fisher
IEEE signal processing magazine 15 (2), 59-85, 1998
1051998
HPC-aware VM placement in infrastructure clouds
A Gupta, LV Kale, D Milojicic, P Faraboschi, SM Balle
2013 IEEE International Conference on Cloud Engineering (IC2E), 11-20, 2013
1012013
Method for storing and decoding instructions for a microprocessor having a plurality of function units
P Faraboschi, P Raje
US Patent 5,930,508, 1999
831999
Main memory with non-volatile memory and DRAM
JC Mogul, EA de Oliveira Dias Jr, P Faraboschi, MA Shah
US Patent 8,296,496, 2012
792012
How to simulate 1000 cores
M Monchiero, JH Ahn, A Falcón, D Ortega, P Faraboschi
ACM SIGARCH Computer Architecture News 37 (2), 10-19, 2009
782009
Instruction scheduling for instruction level parallel processors
P Faraboschi, JA Fisher, C Young
Proceedings of the IEEE 89 (11), 1638-1659, 2001
782001
The who, what, why, and how of high performance computing in the cloud
A Gupta, LV Kale, F Gioachin, V March, CH Suen, BS Lee, P Faraboschi, ...
2013 IEEE 5th international conference on cloud computing technology and …, 2013
732013
TERAFLUX: Harnessing dataflow in next generation teradevices
R Giorgi, RM Badia, F Bodin, A Cohen, P Evripidou, P Faraboschi, ...
Microprocessors and Microsystems 38 (8), 976-990, 2014
712014
Clustered instruction-level parallel processors
P Faraboschi, G Desoli, JA Fisher
Hewlett Packard Laboratories, 1999
691999
Synchronization of asynchronous emulated interrupts
G Desoli, P Faraboschi
US Patent 6,895,460, 2005
642005
Networked client-server architecture for transparently transforming and executing applications
GD V Bala, P Faraboschi
US Patent 20,020,184,618, 2009
63*2009
Evaluating and improving the performance and scheduling of HPC applications in cloud
A Gupta, P Faraboschi, F Gioachin, LV Kale, R Kaufmann, BS Lee, ...
IEEE Transactions on Cloud Computing 4 (3), 307-321, 2014
582014
Methods, Apparatus and Software for Validating Entries Made on a Form
P Faraboschi, A Mackenzie
US Patent App. 11/659,012, 2008
532008
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